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ST16C650AIQ48 データシート(PDF) 1 Page - Exar Corporation |
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ST16C650AIQ48 データシート(HTML) 1 Page - Exar Corporation |
1 / 52 page Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com xr ST16C650A 2.90V TO 5.5V UART WITH 32-BYTE FIFO AUGUST 2005 REV. 5.0.1 GENERAL DESCRIPTION The ST16C650A1 (650A) is a 2.90 to 5.5 volt Universal Asynchronous Receiver and Transmitter (UART) with 5 volt tolerant inputs. This device supports Intel and PC ISA mode data bus interfaces and is software compatible to industry standard 16C450, 16C550, and ST16C580 UARTs. The 650A has 32 bytes of TX and RX FIFOs and is capable of operating up to serial data rates of 3.125 Mbps at 5 volt supply voltage. The internal registers include the 16C550 register set plus Exar’s enhanced registers for additional features to support today’s highly demanding data communication needs. The enhanced features include automatic hardware and software flow control, selectable TX and RX trigger levels, and wireless infrared (IrDA) encoder/decoder. The device provides a new capability to give user the ability to program the wireless infrared encoder output pulse width, hence reducing the power consumption of a handheld unit. The ST16C650A device comes in the 44-pin PLCC and 48-pin TQFP packages in both the commercial and industrial temperature ranges. NOTE: 1 Covered by US patents #5,649,122. FEATURES Added features in devices with a top mark date code of "HC YYWW" and newer: ■ 2.90 to 5.5 Volt Operation ■ 5 Volt Tolerant Inputs ■ Automatic RS485 Half-Duplex Control Output ■ Programmable Infrared Encoder Pulse Width ■ Sleep Mode with Wake-up Indicator ■ Device ID & Revision ■ Up to 3.125 Mbps Data Rate at 5 Volts Added feature in devices with a top mark date code of "I2 YYWW" and newer: ■ 0 ns address hold time • Intel or PC Mode 8-bit Bus Interface • 32-byte Transmit and Receive FIFOs • Automatic Hardware (RTS/CTS) Flow Control • Hardware Flow Control Hysteresis • Automatic Software (Xon/Xoff) Flow Control APPLICATIONS • Battery Operated Electronics • Handheld Terminal • Personal Digital Assistants • Cellular Phones DataPort • Wireless Infrared Data Communications Systems FIGURE 1. BLOCK DIAGRAM XTAL1/CLK XTAL2 Crystal Osc/Buffer DTR#, DSR#, RTS#, CTS#, CD#, RI# Intel or PC Data Bus Interface 32 Byte TX FIFO Baud Rate Generator Infrared Encoder and Pulse Width Control Transmitter UART Configuration Regs IOR IOR# 32 Byte RX FIFO Infrared Decoder Receiver with Auto Software Flow Control Modem Control Signals TX RX CTS Flow Control RTS Flow Control BRG Prescaler CS1 CS0 DDIS# INT TXRDY# RDRDY# A2:A0 D7:D0 IOW CS2# SEL S1 S2 S3 IRQA IRQB IRQC IOW# RESET PC Mode: COM 1 to 4 Decode Logic |
同様の部品番号 - ST16C650AIQ48 |
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同様の説明 - ST16C650AIQ48 |
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