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TDA1306T データシート(PDF) 7 Page - NXP Semiconductors

部品番号 TDA1306T
部品情報  Noise shaping filter DAC
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メーカー  PHILIPS [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA1306T データシート(HTML) 7 Page - NXP Semiconductors

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1998 Jan 06
7
Philips Semiconductors
Product specification
Noise shaping filter DAC
TDA1306T
Table 2
Pseudo-static application mode
PIN
MNEMONIC
PIN NUMBER
TDA1305T
FUNCTION
VALUE
DESCRIPTION
APP0
17
ATSB
0
12 dB attenuation (from full scale) activated
(only if MUSB = logic 1)
1
full scale (only if MUSB = logic 1)
APP1
16
DSMB
0
double-speed mode
1
normal-speed mode
APP2
15
MUSB
0
samples decrease to mute level
1
level according to ATSB
APP3
13
DEEM1
0
de-emphasis OFF (44.1 kHz)
1
de-emphasis ON (44.1 kHz)
MICROCONTROLLER APPLICATION MODE (APPL = LOGIC
1 AND APP3 = LOGIC 0)
In this mode, the device operation is controlled by a set of
flags in an 8-bit mode control register. The 8-bit mode
control register is written by a microcontroller interface
where:
APPL = logic 1
APP0 = Data
APP1 = Clock
APP2 = RAB
APP3 = logic 0.
The correspondence between serial-to-parallel
conversion, mode control flags and a summary of the
effect of the control flags is given in Table 3.
Figures 3 and 4 illustrate the mode set timing.
MICROCONTROLLER WRITE OPERATION SEQUENCE
The microcontroller write operation follows the following
sequence:
• APP2 is held LOW by the microcontroller
• Microcontroller data is clocked into the internal shift
register on the LOW-to-HIGH transition on pin APP1
• Data D7 to D0 is latched into the appropriate control
register on the LOW-to-HIGH transition of pin APP2
(APP1 = HIGH)
• If more data is clocked into the TDA1306T before the
LOW-to-HIGH transition on pin APP2 then only the last
8 bits are used
• If less data is clocked into the TDA1306T unpredictable
operation will result
• If the LOW-to-HIGH transition of pin APP2 occurs when
APP1 = LOW, the command will be disregarded.
Fig.3 Microcontroller timing.


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