データシートサーチシステム |
|
M41T56C64MY6E データシート(PDF) 6 Page - STMicroelectronics |
|
M41T56C64MY6E データシート(HTML) 6 Page - STMicroelectronics |
6 / 19 page Pin settings M41T56C64 6/19 2 Pin settings 2.1 Pin description 2.2 Pin connections Figure 2. 18-pin SOIC connection 1. No connect (NC) pins should be tied to VSS 2. No function (NF) pins should be tied to VSS. Pins 2 and 3, and pins 16 and 17 are internally shorted together. 3. Open drain output Table 1. Signal names FT/OUT (1) 1. Open drain output Frequency test / output driver (open drain) SDA Serial data address input / output SCL Serial clock WC Write control E0, E1, E2 Chip enables VBAT Battery supply voltage VCC Supply voltage VSS Ground NC (2) 2. No connect (NC) pins should be tied to VSS. No connect NF (3) 3. No function (NF) pins should be tied to VSS. Pins 2 and 3, and pins 16 and 17 are internally shorted together. No function AI09124 8 2 3 4 5 6 7 9 12 11 10 18 17 16 15 14 13 1 WC E1 NF (2) NF (2) NC (1) NF (2) NF (2) NC (1) VSS VBAT VCC E0 NC (1) E2 SDA SCL NC (1) FT/OUT (3) M41T56 + M24C64 (EEPROM) |
同様の部品番号 - M41T56C64MY6E |
|
同様の説明 - M41T56C64MY6E |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |