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FM1112-QG データシート(PDF) 2 Page - Ramtron International Corporation |
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FM1112-QG データシート(HTML) 2 Page - Ramtron International Corporation |
2 / 8 page FM1112 NV Quad State Saver Rev. 1.0 Aug. 2007 Page 2 of 8 Block Diagram and Truth Table INPUTS EN CLK Dn OUTPUT Qn H ↑ L L H ↑ H H H H or L X Q0 L X X Hi-Z L Low voltage level H High voltage level X Don’t Care ↑ CLK rising edge Q0 Previous output state before CLK ↑ Pin Descriptions Pin Name I/O Description D(3:0) I Data inputs Q(3:0) O Data outputs CLK I Clock: On a rising edge of CLK, the DN inputs are transferred to the QN outputs. While CLK is high or low, the QN outputs do not change regardless of the state of the data inputs. See truth table. EN I Enable. This active-high input enables the device. When low, inputs are ignored and updates to the nonvolatile cells are prevented. When high, the device operates normally. VDD Supply Power Supply (2.7V to 3.6V) VSS Supply Ground NV State Saver CLK DN QN EN |
同様の部品番号 - FM1112-QG |
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同様の説明 - FM1112-QG |
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