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FM20L08 データシート(PDF) 7 Page - Ramtron International Corporation |
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FM20L08 データシート(HTML) 7 Page - Ramtron International Corporation |
7 / 14 page FM20L08 - Industrial Temp. Rev. 1.72 May 2007 Page 7 of 14 Software Write Protect Timing (-TG1 only) CE A(16:0) WE DQ(7:0) 05555 Data Data OE 1AAAA 03333 1CCCC 100FF 0FF00 1AAAA 1CCCC 0FF00 00000 SRAM Drop-In Replacement The FM20L08 has been designed to be a drop-in replacement for standard asynchronous SRAMs. The device does not require /CE to toggle for each new address. /CE may remain low indefinitely while VDD is applied. When /CE is low, the device automatically detects address changes and a new access is begun. It also allows page mode operation at speeds up to 33MHz. Although /CE may be held low for extended periods of time, the pin should not be tied to ground or held low during power cycles. /CE must be pulled high and allowed to track VDD during powerup and powerdown cycles. It is the user’s responsibility to ensure that chip enable is high to prevent incorrect operation. Figure 3 shows a pullup resistor on /CE which will keep the pin high during power cycles assuming the MCU/MPU pin tri-states during the reset condition. The pullup resistor value should be chosen to ensure the /CE pin tracks VDD yet a high enough value that the current drawn when /CE is low is not an issue. Figure 3. Use of Pullup Resistor on /CE For applications that require the lowest power consumption, the /CE signal should be active only during memory accesses. Due to the external pullup resistor, some supply current will be drawn while /CE is low. When /CE is high, the device draws no more than the maximum standby current ISB. The FM20L08 is backward compatible with the 256Kbit FM18L08 device. So, operating the FM20L08 with /CE toggling low on every address is perfectly acceptable. CE WE OE A(16:0) DQ FM20L08 VDD MCU/ MPU R |
同様の部品番号 - FM20L08_07 |
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同様の説明 - FM20L08_07 |
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