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FM18L08-70-SG データシート(PDF) 7 Page - Ramtron International Corporation |
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FM18L08-70-SG データシート(HTML) 7 Page - Ramtron International Corporation |
7 / 13 page FM18L08 Rev. 3.4 July 2007 7 of 13 Read Cycle AC Parameters (TA = -40° C to + 85° C, VDD = 3.0V to 3.65V) Symbol Parameter Min Max Units Notes tCE Chip Enable Access Time ( to data valid) 70 ns tCA Chip Enable Active Time 70 2,000 ns tRC Read Cycle Time 140 ns tPC Precharge Time 70 ns tAS Address Setup Time 0 ns tAH Address Hold Time 15 ns tOE Output Enable Access Time 10 ns tHZ Chip Enable to Output High-Z 15 ns 1 tOHZ Output Enable to Output High-Z 15 ns 1 Write Cycle AC Parameters (TA = -40° C to + 85° C, VDD = 3.0V to 3.65V) Symbol Parameter Min Max Units Notes tCA Chip Enable Active Time 70 2,000 ns tCW Chip Enable to Write High 70 ns tWC Write Cycle Time 140 ns tPC Precharge Time 70 ns tAS Address Setup Time 0 ns tAH Address Hold Time 15 ns tWP Write Enable Pulse Width 40 ns tDS Data Setup 40 ns tDH Data Hold 0 ns tWZ Write Enable Low to Output High Z 15 ns 1 tWX Write Enable High to Output Driven 10 ns 1 tHZ Chip Enable to Output High-Z 15 ns 1 tWS Write Setup 0 ns 2 tWH Write Hold 0 ns 2 Notes 1 This parameter is periodically sampled and not 100% tested. 2 The relationship between /CE and /WE determines if a /CE- or /WE-controlled write occurs. There is no timing specification associated with this relationship. Data Retention (VDD = 3.0V to 3.65V) Parameter Min Units Notes Data Retention 45 Years 1 Power Cycle Timing (TA = -40° C to + 85° C, VDD = 3.0V to 3.65V) Symbol Parameter Min Units Notes tPU VDD (min.) to First Access Start 1 µS tPD Last Access Complete to VDD (min.) 0 µS Capacitance (TA = 25° C , f=1 MHz, VDD = 3.3V) Symbol Parameter Max Units Notes CI/O Input/Output Capacitance (DQ) 8 pF CIN Input Capacitance 6 pF |
同様の部品番号 - FM18L08-70-SG |
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同様の説明 - FM18L08-70-SG |
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