データシートサーチシステム |
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FM21L16-60-TG データシート(PDF) 3 Page - Ramtron International Corporation |
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FM21L16-60-TG データシート(HTML) 3 Page - Ramtron International Corporation |
3 / 14 page FM21L16 - 128Kx16 FRAM Rev. 1.0 Sept. 2007 Page 3 of 14 Functional Truth Table 1,2 /CE /WE A(16:2) A(1:0) /ZZ Operation X X X X L Sleep Mode H X X X H Standby/Idle ↓ H V V H Read L H No Change Change H Page Mode Read L H Change V H Random Read ↓ L V V H /CE-Controlled Write L ↓ V V H /WE-Controlled Write 2 L ↓ No Change V H Page Mode Write 3 ↑ X X X H Starts Precharge Notes: 1) H=Logic High, L=Logic Low, V=Valid Data, X=Don’t Care. 2) /WE-controlled write cycle begins as a Read cycle and A(16:2) is latched then. 3) Addresses A(1:0) must remain stable for at least 10 ns during page mode operation. 4) For write cycles, data-in is latched on the rising edge of /CE or /WE, whichever comes first. Byte Select Truth Table /OE /LB /UB Operation H X X X H H Read; Outputs Disabled H L Read; DQ(7:0) Hi-Z L H Read; DQ(15:8) Hi-Z L L L Read H L Write; Mask DQ(7:0) L H Write; Mask DQ(15:8) X L L Write Simplified Sleep/Standby State Diagram |
同様の部品番号 - FM21L16-60-TG |
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同様の説明 - FM21L16-60-TG |
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