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FM24CL64-DG データシート(PDF) 9 Page - Ramtron International Corporation

部品番号 FM24CL64-DG
部品情報  64Kb Serial 3V FRAM Memory
Download  13 Pages
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メーカー  RAMTRON [Ramtron International Corporation]
ホームページ  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM24CL64-DG データシート(HTML) 9 Page - Ramtron International Corporation

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FM24CL64
Rev. 3.1
Mar. 2005
Page 9 of 13
AC Parameters (TA = -40° C to + 85° C, VDD =2.7V to 3.65V unless otherwise specified)
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Units
Notes
fSCL
SCL Clock Frequency
0
100
0
400
0
1000
kHz
1
tLOW
Clock Low Period
4.7
1.3
0.6
µs
tHIGH
Clock High Period
4.0
0.6
0.4
µs
tAA
SCL Low to SDA Data Out Valid
3
0.9
0.55
µs
tBUF
Bus Free Before New
Transmission
4.7
1.3
0.5
µs
tHD:STA
Start Condition Hold Time
4.0
0.6
0.25
µs
tSU:STA
Start Condition Setup for Repeated
Start
4.7
0.6
0.25
µs
tHD:DAT
Data In Hold
0
0
0
ns
tSU:DAT
Data In Setup
250
100
100
ns
tR
Input Rise Time
1000
300
300
ns
2
tF
Input Fall Time
300
300
100
ns
2
tSU:STO
Stop Condition Setup
4.0
0.6
0.25
µs
tDH
Data Output Hold
(from SCL @ VIL)
0
0
0
ns
tSP
Noise Suppression Time Constant
on SCL, SDA
50
50
50
ns
Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations.
1
The speed-related specifications are guaranteed characteristic points along a continuous curve of operation from
DC to 1 MHz.
2
This parameter is periodically sampled and not 100% tested.
Capacitance (TA = 25° C, f=1.0 MHz, VDD = 3V)
Symbol
Parameter
Max
Units
Notes
CI/O
Input/output capacitance (SDA)
8
pF
1
CIN
Input capacitance
6
pF
1
Notes
1
This parameter is periodically sampled and not 100% tested.
AC Test Conditions
Input Pulse Levels
0.1 VDD to 0.9 VDD
Input rise and fall times
10 ns
Input and output timing levels
0.5 VDD
Equivalent AC Load Circuit
3.65V
Output
1100
100 pF


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