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74LV86PW データシート(PDF) 8 Page - NXP Semiconductors

部品番号 74LV86PW
部品情報  Quad 2-input exclusive-OR gate
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LV86PW データシート(HTML) 8 Page - NXP Semiconductors

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74LV86_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 27 November 2007
8 of 15
NXP Semiconductors
74LV86
Quad 2-input exclusive-OR gate
12. Package outline
Fig 8.
Package outline SOT27-1 (DIP14)
UNIT
A
max.
1
2
(1)
(1)
b1
cD
(1)
Z
Ee
MH
L
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT27-1
99-12-27
03-02-13
A
min.
A
max.
b
max.
w
M E
e 1
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
0.254
2.54
7.62
8.25
7.80
10.0
8.3
2.2
4.2
0.51
3.2
0.068
0.044
0.021
0.015
0.77
0.73
0.014
0.009
0.26
0.24
0.14
0.12
0.01
0.1
0.3
0.32
0.31
0.39
0.33
0.087
0.17
0.02
0.13
050G04
MO-001
SC-501-14
MH
c
(e )
1
ME
A
L
A1
w M
b1
e
D
A2
Z
14
1
8
7
b
E
pin 1 index
0
5
10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1


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