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TMP1941AF データシート(PDF) 8 Page - Toshiba Semiconductor |
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TMP1941AF データシート(HTML) 8 Page - Toshiba Semiconductor |
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8 / 354 page  TMP1941AF iv 14.5.1 Acknowledgment Mode ........................................................................................................................ 199 14.5.2 Number of Bits Per Transfer................................................................................................................. 199 14.5.3 Serial Clock........................................................................................................................................... 199 14.5.4 Slave Addressing and Address Recognition Mode ............................................................................... 200 14.5.5 Configuring the SBI as a Master or a Slave .......................................................................................... 200 14.5.6 Configuring the SBI as a Transmitter or a Receiver ............................................................................. 201 14.5.7 Generating START and STOP Conditions ........................................................................................... 201 14.5.8 Asserting and Deasserting Interrupt Requests....................................................................................... 202 14.5.9 SBI Operating Modes ........................................................................................................................... 202 14.5.10 Lost-Arbitration Detection Monitor ...................................................................................................... 202 14.5.11 Slave Address Match Monitor .............................................................................................................. 203 14.5.12 General-Call Detection Monitor ........................................................................................................... 203 14.5.13 Last Received Bit Monitor.................................................................................................................... 203 14.5.14 Software Reset ...................................................................................................................................... 204 14.5.15 Serial Bus Interface Data Buffer Register (SBI0DBR)......................................................................... 204 14.5.16 I 2C Bus Address Register (I2C0AR).....................................................................................................204 14.5.17 Baud Rate Register 1 (SBI0DBR1) ...................................................................................................... 204 14.5.18 Baud Rate Register 0 (SBI0BR0) ......................................................................................................... 204 14.6 Programming Sequences in I 2C Bus Mode....................................................................................................205 14.6.1 SBI Initialization................................................................................................................................... 205 14.6.2 Generating a START Condition and a Slave Address .......................................................................... 205 14.6.3 Transferring a Data Word ..................................................................................................................... 206 14.6.4 Generating a STOP Condition .............................................................................................................. 210 14.6.5 Repeated START Condition ................................................................................................................. 211 14.7 Description of Registers Used in Clock-Synchronous 8-Bit SIO Mode ........................................................ 212 14.8 Clock-Synchronous 8-Bit SIO Mode Operation ............................................................................................ 214 14.8.1 Serial Clock........................................................................................................................................... 214 14.8.2 SIO Transfer Modes.............................................................................................................................. 216 15. Analog-to-Digital Converter (ADC).................................................................................................................... 221 15.1 Register Description ...................................................................................................................................... 222 15.2 Operation ....................................................................................................................................................... 227 15.2.1 Analog Reference Voltages................................................................................................................... 227 15.2.2 Selecting an Analog Input Channel (s).................................................................................................. 227 15.2.3 Starting an A/D Conversion .................................................................................................................. 227 15.2.4 Conversion Modes and Conversion-Done Interrupts ............................................................................ 228 15.2.5 Conversion Time................................................................................................................................... 229 15.2.6 Storing and Reading the A/D Conversion Result .................................................................................. 229 15.3 Programming Examples................................................................................................................................. 231 16. Watchdog Timer (WDT) ..................................................................................................................................... 232 16.1 Implementation .............................................................................................................................................. 232 16.2 Register Description ...................................................................................................................................... 234 16.2.1 Watchdog Timer Mode Register (WDMOD) ....................................................................................... 234 16.2.2 Watchdog Timer Control Register (WDCR) ........................................................................................ 234 16.3 Operation ....................................................................................................................................................... 236 17. Real-Time Clock (RTC) ...................................................................................................................................... 237 17.1 Implemention................................................................................................................................................. 237 18. Electrical Characteristics..................................................................................................................................... 239 18.1 Maximum Ratings.......................................................................................................................................... 239 18.2 DC Electrical Characteristics (1/2) ................................................................................................................ 240 18.3 DC Electrical Characteristics (2/2) ................................................................................................................ 241 18.4 AC Electrical Characteristics......................................................................................................................... 242 18.5 ADC Electrical Characteristics ...................................................................................................................... 248 18.6 SIO Timing .................................................................................................................................................... 249 18.6.1 I/O Interface Mode................................................................................................................................ 249 |
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