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AD1882JCPZ1 データシート(PDF) 6 Page - Analog Devices |
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AD1882JCPZ1 データシート(HTML) 6 Page - Analog Devices |
6 / 16 page Rev. 0 | Page 6 of 16 | July 2007 AD1882 HD-AUDIO LINK SPECIFICATIONS HD-Audio signals comply with the High Definition Audio spec- ifications. Please refer to these specifications at: http://www.intel.com/standards/hdaudio/ POWER DOWN STATES Digital GPIO Pins: GPIO_0, GPIO_1/EAPD Input Signal High (VIH)DVIO × 0.60 DVIO V Input Signal Low (VIL)0 DVIO × 0.24 V Input Leakage Current (Signal High, (IIH) 150 nA Input Leakage Current (Signal Low, (IIL)50 μA Output Signal High (VOH)IOUT = –500 μADVIO × 0.72 DVIO V Output Signal Low (VOL)IOUT = +1500 μA0 DVIO × 0.10 V S/PDIF_OUT Output Signal High (VOH)IOUT = –500 μADVIO × 0.72 DVIO V Output Signal Low (VOL)IOUT = +1500 μA0 DVIO × 0.10 V POWER SUPPLY Analog (AV DD) 3.3 V ±5% Power Supply Range Power Dissipation Supply Current 3.13 3.30 119 36 3.46 V mW mA Digital (DVDD) 3.3 V ±10% Power Supply Range Power Dissipation Supply Current 2.97 3.30 198 60 3.63 V mW mA Digital I/O (DVIO) 3.3 V ±10% Power Supply Range Power Dissipation Supply Current 2.97 3.30 3.96 1.20 3.63 V mW mA Power Supply Rejection (100 mV p-p Signal @ 1 kHz) 1 80 dB 1 Guaranteed but not tested. 2 Measurements reflect main ADC. 3 RMS values assume sine wave input. Table 4. AD1882 General Specifications (Continued) Parameter Min Typ Max Unit Table 5. Power Down States Parameter IDVDD Typ IAVDD Typ Unit Function node in D0, all nodes active 60 36 mA Function node in D3 1 1 Function node D3 state powers down all nodes except for the VREF, Mixer and MIC_BIAS nodes which have independent power controls. VREF should be kept active when background functions such as jack presence detection or analog pass-through are required. Mixer should be kept active when analog pass-through is required. MIC_BIAS can be disabled if microphones are not in use in the power-down state. 23 1.2 mA Codec in RESET 33mA Individual block power savings DAC pair powered down saves (each) ADC pair powered down saves (each) Mixer power control (and associated amps) saves MIC_BIAS powered down saves2 2 Powering down the MIC_BIAS powers down all port MIC_BIAS pins. This disables all microphone bias circuits set to 100% or 50%, setting them to the Hi-Z state. The 0 Ω and Hi-Z states remain unaffected by the MIC_BIAS power state. 6 5 0 0 6 4.4 3 1.0 mA mA mA mA |
同様の部品番号 - AD1882JCPZ1 |
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同様の説明 - AD1882JCPZ1 |
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