データシートサーチシステム |
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SN74AHC04RGYRG4 データシート(PDF) 2 Page - Texas Instruments |
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SN74AHC04RGYRG4 データシート(HTML) 2 Page - Texas Instruments |
2 / 13 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) SN74LVCZ161284A 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP SCES358B – SEPTEMBER 2001 – REVISED MAY 2005 The power-on reset (POR) ensures that the Y outputs (Y9–Y13) stay in the high state after power on until an associated input (A9–A13) goes high. When an associated input goes high, all Y outputs are activated, and noninverting signals of the associated inputs are driven through Y outputs. This special feature prevents printer system errors caused by deasserting the BUSY signal in the cable at power on. FUNCTION TABLE INPUTS OUTPUT MODE DIR HD Open drain A9–A13 to Y9–Y13 and PERI LOGIC IN to PERI LOGIC OUT L L Totem pole B1–B8 to A1–A8 and C14–C17 to A14–A17 L H Totem pole B1–B8 to A1–A8, A9–A13 to Y9–Y13, PERI LOGIC IN to PERI LOGIC OUT, and C14–C17 to A14–A17 Open drain A1–A8 to B1–B8, A9–A13 to Y9–Y13, and PERI LOGIC IN to PERI LOGIC OUT H L Totem pole C14–C17 to A14–A17 H H Totem pole A1–A8 to B1–B8, A9–A13 to Y9–Y13, C14–C17 to A14–A17, and PERI LOGIC IN to PERI LOGIC OUT 2 |
同様の部品番号 - SN74AHC04RGYRG4 |
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同様の説明 - SN74AHC04RGYRG4 |
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