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M14256 データシート(PDF) 2 Page - STMicroelectronics

部品番号 M14256
部品情報  Memory Card IC 256/128 Kbit Serial I짼C Bus EEPROM
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M14256 データシート(HTML) 2 Page - STMicroelectronics

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M14256, M14128
2/12
M14128 in wafer form, please contact your ST
sales office.
Each memory device is compatible with the I2C
extended memory standard. This is a two wire se-
rial interface that uses a bi-directional data bus
and serial clock. The memory device carries a
built-in 7-bit unique Device Type Identifier code
(1010000) in accordance with the I2C bus defini-
tion. Only one memory device can be attached to
each I2C bus.
The memory device behaves as a slave device in
the I2C protocol, with all memory operations syn-
chronized by the serial clock. Read and write op-
erations are initiated by a START condition,
generated by the bus master. The START condi-
tion is followed by the Device Select Code which is
composed of a stream of 7 bits (1010000), plus
one read/write bit (R/W) and is terminated by an
acknowledge bit.
When writing data to the memory, the memory de-
vice inserts an acknowledge bit during the 9th bit
time, following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a STOP condition after an Ack for WRITE, and af-
ter a NoACK for READ.
Power On Reset: VCC Lock-Out Write Protect
In order to prevent data corruption and inadvertent
write operations during power up, a Power On Re-
set (POR) circuit is included. The internal reset is
held active until the VCC voltage has reached the
POR threshold value, and all operations are dis-
abled – the device will not respond to any com-
mand. In the same way, when VCC drops from the
operating voltage, below the POR threshold value,
all operations are disabled and the device will not
respond to any command. A stable and valid VCC
must be applied before applying any logic signal.
SIGNAL DESCRIPTION
Serial Clock (SCL)
The SCL input pin is used to synchronize all data
in and out of the memory. A pull up resistor can be
connected from the SCL line to VCC. (Figure 3 in-
dicates how the value of the pull-up resistor can be
calculated).
Serial Data (SDA)
The SDA pin is bi-directional, and is used to trans-
fer data in or out of the memory. It is an open drain
output that may be wire-OR’ed with other open
drain or open collector signals on the bus. A pull
up resistor must be connected from the SDA bus
to VCC. (Figure 3 indicates how the value of the
pull-up resistor can be calculated).
Figure 2. D22 Contact Connections
AI02204
VCC
GND
SCL
SDA
WC
Table 2. Absolute Maximum Ratings 1
Note: 1. Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
2. MIL-STD-883C, 3015.7 (100 pF, 1500
Ω)
3. EIAJ IC-121 (Condition C) (200 pF, 0
Ω)
Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
0 to 70
°C
TSTG
Storage Temperature
-40 to 120
°C
VIO
Input or Output range
-0.6 to 6.5
V
VCC
Supply Voltage
-0.3 to 6.5
V
VESD
Electrostatic Discharge Voltage (Human Body model) 2
4000
V
Electrostatic Discharge Voltage (Machine model) 3
400
V


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