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M27128A-25F1 データシート(PDF) 7 Page - STMicroelectronics

部品番号 M27128A-25F1
部品情報  NMOS 128K 16K x 8 UV EPROM
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M27128A-25F1 データシート(HTML) 7 Page - STMicroelectronics

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tAVPL
VALID
AI00772
A0-A13
Q0-Q7
VPP
VCC
P
G
DATA IN
DATA OUT
E
tQVPL
tVPHPL
tVCHPL
tPHQX
tPLPH
tGLQV
tQXGL
tELPL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 6. Programming and Verify Modes AC Waveforms
AI00775B
n = 1
Last
Addr
VERIFY
P = 1ms Pulse
++n
> 25
++ Addr
VCC = 6V, VPP = 12.5V
FAIL
CHECK ALL BYTES
VCC = 5V, VPP 5V
YES
NO
YES
NO
YES
NO
P = 3ms Pulse by n
Figure 7. Programming Flowchart
continually monitored to determine when it has
been successfully programmed. A flowchart of the
M27128A Fast Programming Algorithm is shown
on the last page. The Fast Programming Algorithm
utilizes two different pulse types: initial and over-
program.
The duration of the initial P pulse(s) is 1ms, which
will then be followed by a longer overprogram pulse
of length 3ms by n (n is equal to the number of the
initial one millisecond pulses applied to a particular
M27128A location), before a correct verify occurs.
Up to 25 one-millisecond pulses per byte are pro-
vided for before the over program pulse is applied.
The entire sequence of program pulses and byte
verifications is performed at VCC = 6V and VPP =
12.5V. When the Fast Programming cycle has been
completed, all bytes should be compared to the
original data with VCC = 5 and VPP = 5V.
Program Inhibit
Programming of multiple M27128A’s in parallel with
different data is also easily accomplished. Except
for E, all like inputs (including G) of the parallel
M27128A may be common. A TTL low pulse ap-
plied to a M27128A’s E input, with VPP = 12.5V, will
program that M27128A. A high level E input inhibits
the other M27128As from being programmed.
DEVICE OPERATION (cont’d)
7/10
M27128A


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