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M27W801-150N6TR データシート(PDF) 9 Page - STMicroelectronics |
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M27W801-150N6TR データシート(HTML) 9 Page - STMicroelectronics |
9 / 16 page 9/16 M27W801 PRESTO IIB Programming Algorithm PRESTO IIB Programming Algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 52.5 seconds. This can be achieved with STMicroelectronics M27W801 due to several design innovations to improve pro- gramming efficiency and to provide adequate mar- gin for reliability. Before starting the programming the internal MARGIN MODE circuit must be set in order to guarantee that each cell is programmed with enough margin. Then a sequence of 50 µs program pulses are applied to each byte until a correct verify occurs (see Figure 8). No overpro- gram pulses are applied since the verify in MAR- GIN MODE at VCC much higher than 3.6V, provides the necessary margin. Program Inhibit Programming of multiple M27W801s in parallel with different data is also easily accomplished. Ex- cept for E, all like inputs including GVPP of the par- allel M27W801 may be common. A TTL low level pulse applied to a M27W801’s E input, with VPP at 12.75V, will program that M27W801. A high level E input inhibits the other M27W801s from being programmed. Program Verify A verify (read) should be performed on the pro- grammed bits to determine that they were correct- ly programmed. The verify is accomplished with G at VIL. Data should be verified with tELQV after the falling edge of E. Figure 7. Programming and Verify Modes AC Waveforms tAVEL VALID AI01270 A0-A19 Q0-Q7 VCC DATA IN DATA OUT E tQVEL tVCHEL tVPHEL tEHQX tEHVPX tELQV tELEH tEHQZ tVPLEL PROGRAM VERIFY GVPP tEHAX Figure 8. Programming Flowchart AI01271C n= 0 Last Addr VERIFY E= 50 µs Pulse ++n =25 ++ Addr VCC = 6.25V, VPP = 12.75V FAIL CHECK ALL BYTES 1st: VCC =5V 2nd: VCC = 2.7V YES NO YES NO YES NO SET MARGIN MODE RESET MARGIN MODE |
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同様の説明 - M27W801-150N6TR |
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