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M41T00 データシート(PDF) 4 Page - STMicroelectronics |
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M41T00 データシート(HTML) 4 Page - STMicroelectronics |
4 / 15 page M41T00 4/15 Table 5. Capacitance (1, 2) (TA = 25 °C, f = 1 MHz) Note: 1. Effective capacitance measured with power supply at 5V. 2. Sampled only, not 100% tested. 3. Outputs deselected. Symbol Parameter Min Max Unit CIN Input Capacitance (SCL) 7 pF COUT (3) Output Capacitance (SDA, FT/OUT) 10 pF tLP Low-pass filter input time constant (SDA and SCL) 250 1000 ns Figure 4. AC Testing Load Circuit AI02568 0.8VCC 0.2VCC 0.7VCC 0.3VCC Table 4. AC Measurement Conditions Note that Output Hi-Z is defined as the point where data is no longer driven. Input Rise and Fall Times ≤ 5ns Input Pulse Voltages 0.2VCC to 0.8VCC Input and Output Timing Ref. Voltages 0.3VCC to 0.7VCC 2-WIRE BUS CHARACTERISTICS This bus is intended for communication between different ICs. It consists of two lines: one bi-direc- tional for data signals (SDA) and one for clock sig- nals (SCL). Both the SDA and the SCL lines must be connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined: – Data transfer may be initiated only when the bus is not busy. – During data transfer, the data line must remain stable whenever the clock line is High. Changes in the data line while the clock line is High will be interpreted as control signals. Accordingly, the following bus conditions have been defined: Bus not busy. Both data and clock lines remain High. Start data transfer. A change in the state of the data line, from High to Low, while the clock is High, defines the START condition. Stop data transfer. A change in the state of the data line, from Low to High, while the clock is High, defines the STOP condition. Data valid. The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the High period of the clock signal. The data on the line may be changed during the Low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a start condition and terminated with a stop condition. The number of data bytes transferred between the start and stop conditions is not limited. The information is transmitted byte-wide and each receiver acknowl- edges with a ninth bit. By definition, a device that gives out a message is called "transmitter", the receiving device that gets the message is called "receiver". The device that controls the message is called "master". The de- vices that are controlled by the master are called "slaves". |
同様の部品番号 - M41T00 |
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同様の説明 - M41T00 |
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