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M74HCT139 データシート(PDF) 1 Page - STMicroelectronics |
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M74HCT139 データシート(HTML) 1 Page - STMicroelectronics |
1 / 9 page M54HCT139 M74HCT139 February 1993 DUAL 2 TO 4 DECODER/DEMULTIPLEXER B1R (Plastic Package) ORDER CODES : M54HCT139F1R M74HCT139M1R M74HCT139B1R M74HCT139C1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Internal Connection INPUT AND OUTPUT EQUIVALENT CIRCUIT DESCRIPTION . HIGH SPEED tPD = 17 ns (TYP.) AT VCC =5 V . LOW POWER DISSIPATION ICC =4 µA (MAX.) AT TA =25 °C . COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE |IOH|= IOL = 4 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH =tPHL . PIN AND FUNCTION COMPATIBLE WITH 54/74LS139 The M54/74HCT139 is a high speed CMOS DUAL TWO LINE TO FOUR LINE DECODER/DEMULTI- PLEXER fabricated in silicon gate C2MOS technol- ogy. It has the same high speed performance of LSTTL combined with true CMOS low power con- sumption. The active low enable input can be used for gating or as a data input for demultiplexing applica- tions. While the enable input is held high, all four out- puts are high independently of the other inputs. All inputs are equipped with protection circuits against static discharge and transient excess volt-age.This in- tegrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC 2MOS systems with TTL and NMOS components. They are also plug in replacements for 1/9 |
同様の部品番号 - M74HCT139 |
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同様の説明 - M74HCT139 |
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