データシートサーチシステム |
|
M74HCT02TTR データシート(PDF) 1 Page - STMicroelectronics |
|
M74HCT02TTR データシート(HTML) 1 Page - STMicroelectronics |
1 / 8 page 1/8 August 2001 s HIGH SPEED: tPD = 15 ns (TYP.) at VCC = 4.5V s LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02 DESCRIPTION The M74HCT02 is an high speed CMOS QUAD 2-INPUT NOR GATE fabricated with silicon gate C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The M74HCT02 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HCT02 QUAD 2-INPUT NOR GATE PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP M74HCT02B1R SOP M74HCT02M1R M74HCT02RM13TR TSSOP M74HCT02TTR TSSOP DIP SOP |
同様の部品番号 - M74HCT02TTR |
|
同様の説明 - M74HCT02TTR |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |