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E-TDA7590 データシート(PDF) 6 Page - STMicroelectronics |
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E-TDA7590 データシート(HTML) 6 Page - STMicroelectronics |
6 / 40 page Pin description TDA7590 6/40 2.2 Pin function Table 1. Pin function N° Name Type Description 1 SRD1/TI02 I/O Serial Receive Data. Serial input data for receiver. Timer 2 input/output. 2 STD1 I/O Serial Transmit Data. Serial output data from transmitter. 3SC02 I/O Serial Control 2.Transmitter frame sync only in asynchronous mode, transmitter and receiver frame sync in synchronous mode. 4SC01 I/O Serial Control 1. Receive frame sync in asynchronous mode, output from transmitter 2 or serial flag 1 in synchronous mode. 5DE_N I/O Test Data Output(Input/Output). Debug Request input and Acknowledge output. 6NMI_N I Non-maskable interrupt/ PINIT. Used to enable the PLL during RESET and as a non-maskable interrupt at all other times. 7 SRD0 I/O Serial Receive Data. Serial input data for receiver. 8 IOVDD I IO Power Supply. 9 IOVSS I IO Ground. 10 STD0 I/O Serial Transmit Data. Serial output data from transmitter. 11 SC10/SCL I/O ESSI1 Serial Control 0. Receive clock in asynchronous mode, output from transmitter or serial flag in synchronous mode. I2C SCL. Serial Clock Line. 12 SC00 I/O Serial Control 0. Receive clock in asynchronous mode, output from transmitter 1 or serial flag 0 in synchronous mode. 13 RXD I/O SCI Receive Data. Receives byte-oriented serial data. 14 TXD I/O SCI Read Enable. Transmits serial data from SCI transmit shift register. 15 SCLK I/O SCI Serial Clock. Input or ouput clock from which data is transferred in synchronous mode and from which the transmit and/or receive baud rate is derived in asynchronous mode. 16 SCK1/TI01 I/O Serial Clock. Serial bit clock for transmitter only in asynchronous mode, serial bit clock for both receiver and transmitter in synchronous mode. Timer 1 input/output. 17 SCK0 I/O Serial Clock. Serial bit clock for transmitter only in asynchronous mode, serial bit clock for both receiver and transmitter in synchronous mode. 18 RESETN I System Reset. A low level applied to RESET_N input initializes the IC. 19 SCANEN I SCAN Enable. When active with TESTEN also active, controls the shifting of the internal scan chains. 20 TESTEN I Test Enable. When active, puts the chip into test mode and muxes the XTI clock to all flip-flops. When SCANEN is also active, the scan chain shifting is enabled. 21 COREVSS I Core Ground. 22 COREVDD I Core Power Supply. 23 TIO0 I/O Timer 0 input/output. |
同様の部品番号 - E-TDA7590 |
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同様の説明 - E-TDA7590 |
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