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MC145151DW2 データシート(PDF) 3 Page - Freescale Semiconductor, Inc |
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MC145151DW2 データシート(HTML) 3 Page - Freescale Semiconductor, Inc |
3 / 24 page MC145151-2 Parallel-Input (Interfaces with Single-Modulus Prescalers) MC145151-2 and MC145152-2 Technical Data, Rev. 5 Freescale Semiconductor 3 Figure 2. MC145151-2 Block Diagram 1.2 Pin Descriptions 1.2.1 Input Pins fin Frequency Input (Pin 1) Input to the ÷N portion of the synthesizer. f in is typically derived from loop VCO and is ac coupled into the device. For larger amplitude signals (standard CMOS logic levels) dc coupling may be used. RA0 - RA2 Reference Address Inputs (Pins 5, 6, 7) These three inputs establish a code defining one of eight possible divide values for the total reference divider, as defined by the table below. Pull-up resistors ensure that inputs left open remain at a logic 1 and require only a SPST switch to alter data to the zero state. Reference Address Code Total Divide Value RA2 RA1 RA0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 8 128 256 512 1024 2048 2410 8192 14 x 8 ROM REFERENCE DECODER 14-BIT ÷ N COUNTER φ V φ R 14-BIT ÷ R COUNTER TRANSMIT OFFSET ADDER PHASE DETECTOR B PHASE DETECTOR A LOCK DETECT LD PDout RA2 fin VDD OSCin OSCout T/R 14 14 fV N13 N11 N9 N7 N6 N4 N2 N0 NOTE: N0 - N13 inputs and inputs RA0, RA1, and RA2 have pull-up resistors that are not shown. RA0 RA1 |
同様の部品番号 - MC145151DW2 |
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同様の説明 - MC145151DW2 |
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