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SN74ABTH182646APM データシート(PDF) 2 Page - Texas Instruments

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部品番号 SN74ABTH182646APM
部品情報  SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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SN74ABTH182646APM データシート(HTML) 2 Page - Texas Instruments

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SN54ABTH18646A, SN54ABTH182646A, SN74ABTH18646A, SN74ABTH182646A
SCAN TEST DEVICES WITH
18-BIT TRANSCEIVERS AND REGISTERS
SCBS166D – AUGUST 1993 – REVISED JULY 1996
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
18 19
48
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1
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21 22 23 24
63 62 61 60 59
64
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56 55 54
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53 52
17
51 50 49
30 31 32
1A3
1A4
1A5
GND
1A6
1A7
1A8
1A9
VCC
2A1
2A2
2A3
GND
2A4
2A5
2A6
1B4
1B5
1B6
GND
1B7
1B8
1B9
VCC
2B1
2B2
2B3
2B4
GND
2B5
2B6
2B7
SN74ABTH18646A, SN74ABTH182646A . . . PM PACKAGE
(TOP VIEW)
description
The ’ABTH18646A and ’ABTH182646A scan test devices with 18-bit bus transceivers and registers are
members of the Texas Instruments SCOPE
™ testability integrated-circuit family. This family of devices supports
IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan
access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
In the normal mode, these devices are 18-bit bus transceivers and registers that allow for multiplexed
transmission of data directly from the input bus or from the internal registers. They can be used either as two
9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot
samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating
the TAP in the normal mode does not affect the functional operation of the SCOPE
™ bus transceivers and
registers.
Transceiver function is controlled by output-enable (OE) and direction (DIR) inputs. When OE is low, the
transceiver is active and operates in the A-to-B direction when DIR is high or in the B-to-A direction when DIR
is low. When OE is high, both the A and B outputs are in the high-impedance state, effectively isolating both
buses.
Data flow is controlled by clock (CLKAB and CLKBA) and select (SAB and SBA) inputs. Data on the A bus is
clocked into the associated registers on the low-to-high transition of CLKAB. When SAB is low, real-time A data
is selected for presentation to the B bus (transparent mode). When SAB is high, stored A data is selected for
presentation to the B bus (registered mode). The function of the CLKBA and SBA inputs mirrors that of CLKAB
and SAB, respectively. Figure 1 shows the four fundamental bus-management functions that are performed with
the ’ABTH18646A and ’ABTH182646A.


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