SN74ABT3612 datasheet(4/31 Pages) TI

部品番号	SN74ABT3612

部品情報	64 횞 36 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY

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メーカー	TI [Texas Instruments]

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4 / 31 page

SN74ABT3612

64

× 36 × 2

CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY

SCBS129G – JULY 1992 – REVISED APRIL 1998

4

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

functional block diagram

Port-A

Control

Logic

AFA

FIFO1

Programmable-Flag

Offset Register

Read

Pointer

64

× 36

SRAM

Port-B

Control

Logic

MBB

Write

Pointer

Mail2

Register

FIFO2

Status-Flag

Logic

Status-Flag

Logic

Write

Pointer

CLKA

CSA

W/RA

ENA

MBA

FFA

FS0

A0 – A35

EFA

AEA

Device

Control

64

× 36

SRAM

Mail1

Register

Read

Pointer

FS1

MBF2

AEB

CLKB

CSB

ENB

36

RST

MBF1

EFB

B0 – B35

FFB

AFB

PEFB

PGB

ODD/

EVEN

W/RB

Parity

Gen/Check

PEFA

PGA

Parity

Gen/Check

36

同様の部品番号 - SN74ABT3612

メーカー	部品番号	データシート	部品情報
Texas Instruments	SN74ABT3612	521Kb / 34P	[Old version datasheet] CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
	SN74ABT3612-15PQ	521Kb / 34P	[Old version datasheet] CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
	SN74ABT3612	521Kb / 34P	[Old version datasheet] CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY

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同様の説明 - SN74ABT3612

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