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ST16C650A データシート(PDF) 8 Page - Exar Corporation |
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ST16C650A データシート(HTML) 8 Page - Exar Corporation |
8 / 52 page ST16C650A 8 2.90V TO 5.5V UART WITH 32-BYTE FIFO REV. 5.0.2 2.0 FUNCTIONAL DESCRIPTIONS 2.1 Host Data Bus Interface The host interface is 8 data bits wide with 3 address lines and control signals to execute bus read and write transactions. The 650A supports 2 type of host interfaces: Intel and PC mode. The Intel bus interface is selected by connecting SEL to a logic 1. The Intel bus interconnections are shown in Figure 3. The special PC mode is selected when SEL is connected to a logic 0. The PC mode interconnections are shown in Figure 4. FIGURE 3. ST16C650A INTEL BUS INTERCONNECTIONS FIGURE 4. ST16C650A PC MODE INTERCONNECTIONS D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 IOR* IOW* RESET D0 D1 D2 D3 D4 D5 D6 D7 IOR# IOW# A0 A1 A2 CS2# RESET VCC CS0 CS1 AS# IOR IOW INT INT RCLK BAUDOUT# SEL VCC GND CS# OP2# OP1# DSR# CTS# RTS# DTR# RX TX RI# CD# D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 A7 A14 A15 AEN# IOW# IOR# RESET D0 D1 D2 D3 D4 D5 D6 D7 IOW# A0 A1 A2 RESET VCC CS0 CS1 AS# IOR IOW IRQn IRQA SEL VCC GND IOR# IRQB IRQC IRQ4 IRQ3 A3 A4 A5 A6 A7 A8 A9 AEN* OP1# RI# CD# DSR# CTS# RX TX RTS# DTR# S1 S2 S3 VCC GND GND |
同様の部品番号 - ST16C650A_09 |
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同様の説明 - ST16C650A_09 |
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