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ATXMEGA128A1-AU データシート(PDF) 36 Page - ATMEL Corporation

部品番号 ATXMEGA128A1-AU
部品情報  8/16-bit XMEGA A1 Microcontroller
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メーカー  ATMEL [ATMEL Corporation]
ホームページ  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATXMEGA128A1-AU データシート(HTML) 36 Page - ATMEL Corporation

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36
8067I–AVR–04/09
XMEGA A1
19. TWI - Two-Wire Interface
19.1
Features
• Four Identical TWI peripherals
• Simple yet Powerful and Flexible Communication Interface
• Both Master and Slave Operation Supported
• Device can Operate as Transmitter or Receiver
• 7-bit Address Space Allows up to 128 Different Slave Addresses
• Multi-master Arbitration Support
• Up to 400 kHz Data Transfer Speed
• Slew-rate Limited Output Drivers
• Noise Suppression Circuitry Rejects Spikes on Bus Lines
• Fully Programmable Slave Address with General Call Support
• Address Recognition Causes Wake-up when in Sleep Mode
• I2C and System Management Bus (SMBus) compatible
19.2
Overview
The Two-Wire Interface (TWI) is a bi-directional wired-AND bus with only two lines, the clock
(SCL) line and the data (SDA) line. The protocol makes it possible to interconnect up to 128 indi-
vidually addressable devices. Since it is a multi-master bus, one or more devices capable of
taking control of the bus can be connected.
The only external hardware needed to implement the bus is a single pull-up resistor for each of
the TWI bus lines. Mechanisms for resolving bus contention are inherent in the TWI protocol.
PORTC, PORTD, PORTE, and PORTF each has one TWI. Notation of these peripherals are
TWIC, TWID, TWIE, and TWIF, respectively.


同様の部品番号 - ATXMEGA128A1-AU

メーカー部品番号データシート部品情報
logo
ATMEL Corporation		 ATXMEGA128A1-AU ATMEL-ATXMEGA128A1-AU Datasheet
1Mb / 82P		    8/16-bit XMEGA A1 Microcontroller
ATXMEGA128A1-AU ATMEL-ATXMEGA128A1-AU Datasheet
3Mb / 107P		    8/16-bit XMEGA A1 Microcontroller
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同様の説明 - ATXMEGA128A1-AU

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