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TS4GDOM44H-S データシート(PDF) 10 Page - Transcend Information. Inc. |
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TS4GDOM44H-S データシート(HTML) 10 Page - Transcend Information. Inc. |
10 / 34 page T T Tr rra a an n ns s sc c ce e en n nd d d 4 4 44 4 4---P P Piiin n n IIID D DE E E F F Fllla a as s sh h h M M Mo o od d du u ullle e e (((H H Ho o or rriiiz zzo o on n nttta a alll))) T T TS S S1 1 12 2 28 8 8M M M ~ ~ ~ 4 4 4G G GD D DO O OM M M4 4 44 4 4H H H---S S S Transcend Information Inc. Ver 1.0 10 Ultra DMA Mode Read/Write Timing Specification Ultra DMA is an optional data transfer protocol used with the READ DMA, and WRITE DMA, commands. When this protocol is enabled, the Ultra DMA protocol shall be used instead of the Multiword DMA protocol when these commands are issued by the host. This protocol applies to the Ultra DMA data burst only. When this protocol is used there are no changes to other elements of the ATA protocol. UDMA Signal Type TRUE IDE MODE UDMA DMARQ Output DMARQ DMACK Input -DMACK STOP Input STOP 1 HDMARDY(R) HSTROBE(W) Input -HDMARDY 1,2 HSTROBE(W) 1,3,4 DDMARDY(W) DSTROBE(R) Output -DDMARDY(W) 1,3 DSTROBE(R) 1,2,4 DATA Bidir D[15:00] ADDRESS Input A[02:00] 5 CSEL input -CSEL INTRQ Output INTRQ Card Select Input -CS0 -CS1 Notes: 1) The UDMA interpretation of this signal is valid only during an Ultra DMA data burst. 2) The UDMA interpretation of this signal is valid only during and Ultra DMA data burst during a DMA Read command. 3) The UDMA interpretation of this signal is valid only during an Ultra DMA data burst during a DMA Write command. 4) The HSTROBE and DSTROBE signals are active on both the rising and the falling edge. 5) Address lines 03 through 10 are not used in True IDE mode. Several signal lines are redefined to provide different functions during an Ultra DMA data burst. These lines assume their UDMA definitions when: 1. An Ultra DMA mode is selected, and 2. A host issues a READ DMA, or a WRITE DMA command requiring data transfer, and 3. The device asserts (-)DMARQ, and 4. The host asserts (-)DMACK. These signal lines revert back to the definitions used for non-Ultra DMA transfers upon the negation of -DMACK by the host at the termination of an Ultra DMA data burst. With the Ultra DMA protocol, the STROBE signal that latches data from D[15:00] is generated by the same agent (either host or device) that drives the data onto the bus. Ownership of D[15:00] and this data strobe signal are given either to the device during an Ultra DMA data-in burst or to the host for an Ultra |
同様の部品番号 - TS4GDOM44H-S |
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同様の説明 - TS4GDOM44H-S |
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