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ADMP421 データシート(PDF) 6 Page - Analog Devices |
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ADMP421 データシート(HTML) 6 Page - Analog Devices |
6 / 16 page ADMP421 Rev. 0 | Page 6 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 CLK L/R SELECT GND DATA VDD 4 5 Figure 4. Pin Configuration (Bottom View) Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 CLK Clock Input to Microphone. 2 L/R SELECT Left Channel or Right Channel Select. DATA1 (right): L/R SELECT tied to GND. DATA2 (left): L/R SELECT pulled to VDD. 3 GND Ground. 4 VDD Power Supply. For best performance and to avoid potential parasitic artifacts, placing a 0.1 μF (100 nF) ceramic type X7R or better capacitor between Pin 4 (VDD) and ground is strongly recommended. The capacitor should be placed as close to Pin 4 as possible. 5 DATA Digital Output Signal (DATA1, DATA2). |
同様の部品番号 - ADMP421 |
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同様の説明 - ADMP421 |
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