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74ABT646A データシート(PDF) 5 Page - NXP Semiconductors |
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74ABT646A データシート(HTML) 5 Page - NXP Semiconductors |
5 / 19 page 74ABT646A_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 15 March 2010 5 of 19 NXP Semiconductors 74ABT646A Octal bus transceiver/register; 3-state 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH clock transition; [2] The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition of the clock. Table 3. Function table[1] Inputs Data I/O Operating mode OE DIR CPAB CPBA SAB SBA An Bn XX ↑ X X X input unspecified output[2] store A, B unspecified XXX ↑ X X unspecified output[2] input store B, A unspecified HX ↑↑ X X input input store A and B data H X H or L H or L X X input input isolation, hold storage L L XXXL output input real time B data to A bus L L X H or L X H output input stored B data to A bus L H X X L X input output real time A data to B bus L H H or L X H X input output stored A data to B bus |
同様の部品番号 - 74ABT646A |
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同様の説明 - 74ABT646A |
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