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SM320C6713BZDP225 データシート(PDF) 3 Page - Texas Instruments

部品番号 SM320C6713BZDP225
部品情報  FLOATING-POINT DIGITAL SIGNAL PROCESSORS
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SM320C6713BZDP225 データシート(HTML) 3 Page - Texas Instruments

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TMS320C6713B
FLOATINGPOINT DIGITAL SIGNAL PROCESSOR
SPRS294B − OCTOBER 2005 − REVISED JUNE 2006
3
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
REVISION HISTORY
The TMS320C6713B device-specific documentation has been split from TMS320C6713, TMS320C6713B Float-
ing−Point Digital Signal Processors, literature number SPRS186K, into a separate Data Sheet, literature number
SPRS294. It also highlights technical changes made to SPRS294 to generate SPRS294A. These changes are
marked by “[Revision A].” Additionally, made changes to SPRS294A to generate SPRS294B. These changes
are marked by “[Revision B].” Both Revision A and B changes are noted in the Revision History table below.
Scope: Updated information on McASP, McBSP and JTAG for clarification. Changed Pin Description for A12 and
B11 (Revisions SPRS294 and SPRS294A). Updated Nomenclature figure by adding device−specific information
for the ZDP package. TI Recommends for new designs that the following pins be configured as such:
D Pin A12 connected directly to CVDD (core power)
D Pin B11 connected directly to Vss (ground)
PAGE(S)
NO.
ADDITIONS/CHANGES/DELETIONS
6
Terminal Assignments for the 272-Ball GDP and ZDP Packages (in Order of Ball No.) table:
Updated Signal Name for Ball No. A12
Updated Signal Name for Ball No. B11
10
PYP PowerPAD QFP package (top view):
Updated drawing
32
Device Configurations, device configurations at device reset section:
Updated “For proper device operation...” paragraph [Revision B]
33
Device Configurations, Device Configurations Pins at Device Reset (HD[4:3], HD8, HD12, and CLKMODE0) section:
Removed “CE1 width 32−bit” from Functional Description for “00” in HD[4:3](BOOTMODE) Configuration Pin
33
Device Configurations, Device Configurations Pins at Device Reset (HD[4:3], HD8, HD12, and CLKMODE0) section:
Updated “All other HD pins...” footnote [Revision B]
37
Table 22 Peripheral Pin Selection Matrix:
Updated/changed MCBSP0DIS (DEVCFG bit) from “ACLKKO” to “ACLKXO”
46
Configuration Example F (1 McBSP + HPI + 1 McASP) figure:
Updated from McBSP1DIS = 1 to McBSP1DIS = 0
47
Device Configurations, debugging considerations section:
Updated “Internal pullup/pulldown resistors...” paragraph [Revision B]
49
Terminal Functions, Resets and Interrupts section:
Updated IPU/IPD for RESET Signal Name from “IPU” to “−−”
50
Terminal Functions table, Host Port Interface section:
Removed “CE1 width 32−bit” from Description for “00” in Bootmode HD[4:3]
50
Terminal Functions table, Host Port Interface section:
Updated “Other HD pins...” paragraph [Revision B]
55
Terminal Functions, Timer 1 section:
Updated Description for TINP1/AHCLKX0 Signal Name
57
Terminal Functions, Reserved for Test section:
Updated Description for RSV Signal Name, 181 PYP, A12 GDP/ZDP
Updated Description for RSV Signal Name, 180 PYP, B11 GDP/ZDP


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