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ADM1027ARQZ-REEL データシート(PDF) 11 Page - ON Semiconductor |
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ADM1027ARQZ-REEL データシート(HTML) 11 Page - ON Semiconductor |
11 / 56 page REV. A ADM1027 –11– 5. Once the ADM1027 has responded to the alert response address, the master must read the status registers and the SMBALERT will only be cleared if the error condition has gone away. SMBus Timeout The ADM1027 includes an SMBus timeout feature. If there is no SMBus activity for a minimum of 15 ms and a maximum of 35 ms, the ADM1027 assumes that the bus is locked and releases the bus. This prevents the device from locking or holding the SMBus expecting data. Some SMBus controllers cannot handle the SMBus timeout feature, so it can be disabled. CONFIGURATION REGISTER 1 – Register 0x40 <6> TODIS = 0; SMBus timeout enabled (default) <6> TODIS = 1; SMBus timeout disabled VOLTAGE MEASUREMENT INPUTS The ADM1027 has four external voltage measurement channels. It can also measure its own supply voltage, VCC. Pins 20 to 23 are dedicated to measuring 5 V, 12 V, 2.5 V supplies and the processor core voltage VCCP (0 V to 3 V input). The VCC supply voltage measurement is carried out through the VCC pin (Pin 4). Setting Bit 7 of Configuration Register 1 (Reg. 0x40) allows a 5 V supply to power the ADM1027 and be measured without overranging the VCC measurement channel. The 2.5 V input can be used to monitor a chipset supply voltage in com- puter systems. ANALOG-TO-DIGITAL CONVERTER All analog inputs are multiplexed into the on-chip, successive approximation, analog-to-digital converter. This has a resolu- tion of 10 bits. The basic input range is 0 V to 2.25 V, but the inputs have built-in attenuators to allow measurement of 2.5 V, 3.3 V, 5 V, 12 V and the processor core voltage VCCP, without any external components. To allow for the tolerance of these supply voltages, the ADC produces an output of 3/4 full scale (768 decimal or 300 hex) for the nominal input voltage, and so has adequate headroom to cope with overvoltages. INPUT CIRCUITRY The internal structure for the analog inputs is shown in Figure 12. Each input circuit consists of an input protection diode, an attenuator, and a capacitor to form a first order low-pass filter that gives the input immunity to high frequency noise. VOLTAGE MEASUREMENT REGISTERS Reg. 0x20 2.5 V Reading = 0x00 default Reg. 0x21 VCCP Reading = 0x00 default Reg. 0x22 VCC Reading = 0x00 default Reg. 0x23 5 V Reading = 0x00 default Reg. 0x24 12 V Reading = 0x00 default VOLTAGE MEASUREMENT LIMIT REGISTERS Associated with each voltage measurement channel are high and low limit registers. Exceeding the programmed high or low limit causes the appropriate status bit to be set. Exceeding either limit can also generate SMBALERT interrupts. Reg. 0x44 2.5 V Low Limit = 0x00 default Reg. 0x45 2.5 V High Limit = 0xFF default Reg. 0x46 VCCP Low Limit = 0x00 default Reg. 0x47 VCCP High Limit = 0xFF default Reg. 0x48 VCC Low Limit = 0x00 default Reg. 0x49 VCC High Limit = 0xFF default Reg. 0x4A 5 V Low Limit = 0x00 default Reg. 0x4B 5 V High Limit = 0xFF default Reg. 0x4C 12 V Low Limit = 0x00 default Reg. 0x4D 12 V High Limit = 0xFF default 30pF 120k 30pF 93k MUX 30pF 68k 30pF 45k 105k 35pF 35k 94k 71k 47k 20k 12VIN 5VIN 3.3VIN 2.5VIN VCCPIN Figure 12. Structure of Analog Inputs Table II shows the input ranges of the analog inputs and output codes of the 10-bit A/D converter. When the ADC is running, it samples and converts a voltage input in 711 ms, and averages 16 conversions to reduce noise. Therefore a measurement on any input takes nominally 11.38 ms. Rev. 3 | Page 11 of 56 | www.onsemi.com |
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