TPA3111D1

SLOS618A – AUGUST 2009 – REVISED JULY 2010

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

(1)

UNIT

Supply voltage

AVCC, PVCC

–0.3 V to 30 V

SD, FAULT,GAIN0, GAIN1

Interface pin voltage

PLIMIT

–0.3 V toGVDD + 0.3 V

INN, INP

–0.3 V to 6.3 V

Continuous total power dissipation

See Dissipation Rating Table

Operating free-air temperature range

–40°C to 85°C

–40°C to 150°C

Storage temperature range

–65°C to 150°C

Minimum Load Resistance

BTL

3.2

±2 kV

Electrostatic discharge

±500 V

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The TPA3111D1 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected

to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection

shutdown. See TI Technical Briefs SCBA017D and SLUA271 for more information about using the QFN thermal pad. See TI Technical

Briefs SLMA002 for more information about using the HTQFP thermal pad.

(3)

In accordance with JEDEC Standard 22, Test Method A114-B.

(4)

In accordance with JEDEC Standard 22, Test Method C101-A

TYPICAL DISSIPATION RATINGS

DERATING FACTOR

28 pin TSSOP

0.72

4.98 W

25.1 °C/W

2.59 W

0.45 °C/W

(PWP)

°C/W

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

Supply voltage

PVCC, AVCC

8

26

V

High-level input voltage

SD, GAIN0, GAIN1

2

V

Low-level input voltage

SD, GAIN0, GAIN1

0.8

V

Low-level output voltage

0.8

V

High-level input current

50

µA

Low-level input current

5

µA

Operating free-air temperature

–40

85

°C

DC CHARACTERISTICS

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

UNIT

Class-D output offset voltage (measured

1.5

15

mV

differentially)

Quiescent supply current

SD = 2 V, no load, PVcc=21V

40

mA

2

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