MC145554

•MC145557•MC145564•MC145567

MOTOROLA

9

DIGITAL SWITCHING CHARACTERISTICS

(VCC = 5 V ± 5%, VBB = – 5 V ± 5%, GNDA = 0 V, All Signals Referenced to GNDA; TA = – 40 to + 85°C, Cload = 150 pF Unless Otherwise

Noted)

Characteristic

Symbol

Min

Typ

Max

Unit

Master Clock Frequency

MCLKX or MCLKR

fM

—

—

—

1.536

1.544

2.048

—

—

—

MHz

Minimum Pulse Width High or Low

MCLKX or MCLKR

tw(M)

100

—

—

ns

Minimum Pulse Width High or Low

BCLKX or BCLKR

tw(B)

50

—

—

ns

Minimum Pulse WIdth Low

FSX or FSR

tw(FL)

50

—

—

ns

Rise Time for all Digital Signals

tr

—

—

50

ns

Fall Time for all Digital Signals

tf

—

—

50

ns

Bit Clock Data Rate

BCLKX or BCLKR

fB

128

—

4096

kHz

Setup Time from BCLKX Low to MCLKR High

tsu(BRM)

50

—

—

ns

Setup Time from MCLKX High to BCLKX Low

tsu(MFB)

20

—

—

ns

Hold Time from BCLKX (BCLKR) Low to FSX (FSR) High

th(BF)

20

—

—

ns

Setup Time for FSX (FSR) High to BCLKX (BCLKR) Low for Long Frame

tsu(FB)

80

—

—

ns

Delay Time from BCLKX High to DX Data Valid

td(BD)

20

60

140

ns

Delay Time from BCLKX High to TSX Low

td(BTS)

20

50

140

ns

Delay Time from the 8th BCLKX Low of FSX Low to DX Output Disabled

td(ZC)

50

70

140

ns

Delay Time to Valid Data from FSX or BCLKX, Whichever is Later

td(ZF)

20

60

140

ns

Setup Time from DR Valid to BCLKX Low

tsu(DB)

0

—

—

ns

Hold Time from BCLKR Low to DR Invalid

th(BD)

50

—

—

ns

Setup Time from FSX (FSR) High to BCLKX (BCLKR) Low in Short Frame

tsu(F)

50

—

—

ns

Hold Time from BCLKX (BCLKR) Low to FSX (FSR) Low in Short Frame

th(F)

50

—

—

ns

Hold Time from 2nd Period of BCLKX (BCLKR) Low to FSX (FSR) Low in

Long Frame

th(BFI)

50

—

—

ns