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KM4132G271A データシート(PDF) 10 Page - Samsung semiconductor |
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KM4132G271A データシート(HTML) 10 Page - Samsung semiconductor |
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10 / 48 page  KM4132G271A CMOS SGRAM Rev.0 (August 1997) SGRAM vs SDRAM If DSF is low, SGRAM functionality is identical to SDRAM functionality. SGRAM can be used as an unified memory by the appropriate DSF control --> SGRAM=Graphic Memory + Main Memory SDRAM Function MRS Bank Active Write DSF L H L H L H SGRAM Function MRS SMRS Bank Active with Write per bit Disable Bank Active with Write per bit Enable Normal Write Block Write 3. Auto refresh functions as same as CBR refresh of DRAM. The automatical precharge without Row precharge command is meant by "Auto". Auto/Self refresh can be issued only at both precharge state. 4. A9 : Bank select address. If "Low" at read, (block) write, Row active and precharge, bank A is selected. If "High" at read, (block) write, Row active and precharge, bank B is selected. If A8 is "High" at Row precharge, A9 is ignored and both banks are selected. 5. It is determined at Row active cycle. whether Normal/Block write operates in write per bit mode or not. For A bank write, at A bank Row active, for B bank write, at B bank Row active. Terminology : Write per bit =I/O mask (Block) Write with write per bit mode=Masked(Block) Write 6. During burst read or write with auto precharge, new read/(block) write command cannot be issued. Another bank read/(block) write command can be issued at tRP after the end of burst. 7. Burst stop command is valid only at full page burst length. 8. DQM sampled at positive going edge of a CLK. masks the data-in at the very CLK(Write DQM latency is 0) but makes Hi-Z state the data-out of 2 CLK cycles after.(Read DQM latency is 2) 9. Graphic features added to SDRAM's original features. If DSF is tied to low, graphic functions are disabled and chip operates as a 8M SDRAM with 32 DQ's. SIMPLIFIED TRUTH TABLE |
同様の部品番号 - KM4132G271A |
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同様の説明 - KM4132G271A |
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