データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

ISL12027IBAZ データシート(PDF) 11 Page - Intersil Corporation

部品番号 ISL12027IBAZ
部品情報  Real Time Clock/Calendar with EEPROM
Download  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL12027IBAZ データシート(HTML) 11 Page - Intersil Corporation

Back Button ISL12027IBAZ Datasheet HTML 7Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 8Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 9Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 10Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 11Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 12Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 13Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 14Page - Intersil Corporation ISL12027IBAZ Datasheet HTML 15Page - Intersil Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 28 page
background image
11
FN8232.8
August 12, 2010
0 to 23 (with MIL = 1), DT (Date) is 1 to 31, MO (Month) is 1
to 12, YR (Year) is 0 to 99.
DW: Day of the Week Register
This register provides a Day of the Week status and uses
three bits DY2 to DY0 to represent the seven days of the
week. The counter advances in the cycle 0-1-2-3-4-5-6-0-1-
2-… The assignment of a numerical value to a specific day
of the week is arbitrary and may be decided by the system
software designer. The default value is defined as ‘0’.
Y2K: Year 2000 Register
Can have value 19 or 20. As of the date of the introduction of
this device, there would be no real use for the value 19 in a
true real time clock, however.
24 Hour Time
If the MIL bit of the HR register is 1, the RTC uses a 24-hour
format. If the MIL bit is 0, the RTC uses a 12-hour format and
H21 bit functions as an AM/PM indicator with a ‘1’,
representing PM. The clock defaults to standard time with
H21 = 0.
Leap Years
Leap years add the day February 29 and are defined as
those years that are divisible by 4.
Status Register (SR) (Volatile)
The Status Register is located in the CCR memory map at
address 003Fh. This is a volatile register only and is used to
control the WEL and RWEL write enable latches, read power
status and two alarm bits. This register is separate from both
the array and the Clock/Control Registers (CCR).
BAT: Battery Supply
This bit set to “1” indicates that the device is operating from
VBAT, not VDD. It is a read-only bit and is set/reset by
hardware (ISL12027 internally). Once the device begins
operating from VDD, the device sets this bit to “0”.
AL1, AL0: Alarm Bits
These bits announce if either alarm 0 or alarm 1 match the
real time clock. If there is a match, the respective bit is set to
‘1’. The falling edge of the last data bit in a SR Read
operation resets the flags. Note: Only the AL bits that are set
when an SR read starts will be reset. An alarm bit that is set
by an alarm occurring during an SR read operation will
remain set after the read operation is complete.
OSCF: Oscillator Fail Indicator
This bit is set to “1” if the oscillator is not operating, or is
operating but has clock jitter which does not affect the
accuracy of RTC counting. The bit is set to “0” if the oscillator
is functioning and does not have clock jitter. This bit is read
only, and is set/reset by hardware.
RWEL: Register Write Enable Latch
This bit is a volatile latch that powers up in the LOW
(disabled) state. The RWEL bit must be set to “1” prior to any
writes to the Clock/Control Registers. Writes to RWEL bit do
not cause a non-volatile write cycle, so the device is ready
for the next operation immediately after the stop condition. A
write to the CCR requires both the RWEL and WEL bits to be
set in a specific sequence.
WEL: Write Enable Latch
The WEL bit controls the access to the CCR during a write
operation. This bit is a volatile latch that powers up in the
LOW (disabled) state. While the WEL bit is LOW, writes to
the CCR address will be ignored, although acknowledgment
is still issued. The WEL bit is set by writing a “1” to the WEL
bit and zeroes to the other bits of the Status Register. Once
set, WEL remains set until either reset to 0 (by writing a “0”
to the WEL bit and zeroes to the other bits of the Status
Register) or until the part powers up again. Writes to WEL bit
do not cause a non-volatile write cycle, so the device is
ready for the next operation immediately after the stop
condition.
RTCF: Real Time Clock Fail Bit
This bit is set to a “1” after a total power failure. This is a read
only bit that is set by hardware (ISL12027 internally) when
the device powers up after having lost all power to the device
(both VDD and VBAT go to 0V). The bit is set regardless of
whether VDD or VBAT is applied first. The loss of only one of
the supplies does not set the RTCF bit to “1”. On power up
after a total power failure, all registers are set to their default
states and the clock will not increment until at least one byte
is written to the clock register. The first valid write to the RTC
section after a complete power failure resets the RTCF bit to
“0” (writing one byte is sufficient).
Unused Bits:
Bit 3 in the SR is not used, but must be zero. The Data Byte
output during a SR read will contain a zero in this bit
location.
TABLE 1. STATUS REGISTER (SR)
ADDR
7
6
5
4
3
2
1
0
003Fh
BAT
AL1
AL0 OSCF
0
RWEL WEL RTCF
Default
0
0
0
0
0
0
0
1
ISL12027, ISL12027A


同様の部品番号 - ISL12027IBAZ

メーカー部品番号データシート部品情報
logo
Intersil Corporation
ISL12027IBAZ INTERSIL-ISL12027IBAZ Datasheet
414Kb / 28P
   Real Time Clock/Calendar with EEPROM
logo
Renesas Technology Corp
ISL12027IBAZ RENESAS-ISL12027IBAZ Datasheet
1Mb / 29P
   Real Time Clock/Calendar with EEPROM
logo
Intersil Corporation
ISL12027IBAZ-T INTERSIL-ISL12027IBAZ-T Datasheet
414Kb / 28P
   Real Time Clock/Calendar with EEPROM
More results

同様の説明 - ISL12027IBAZ

メーカー部品番号データシート部品情報
logo
Xicor Inc.
X1240 XICOR-X1240 Datasheet
74Kb / 19P
   Real Time Clock/Calendar with EEPROM
logo
Intersil Corporation
ISL12027 INTERSIL-ISL12027 Datasheet
414Kb / 28P
   Real Time Clock/Calendar with EEPROM
logo
Renesas Technology Corp
ISL12027 RENESAS-ISL12027 Datasheet
1Mb / 29P
   Real Time Clock/Calendar with EEPROM
logo
Intersil Corporation
ISL12026 INTERSIL-ISL12026 Datasheet
381Kb / 24P
   Real Time Clock/Calendar with EEPROM
ISL12029 INTERSIL-ISL12029 Datasheet
426Kb / 28P
   Real Time Clock/Calendar with EEPROM
logo
Xicor Inc.
X1226 XICOR-X1226 Datasheet
420Kb / 24P
   Real Time Clock/Calendar with EEPROM
logo
Intersil Corporation
ISL12028 INTERSIL-ISL12028 Datasheet
423Kb / 28P
   Real Time Clock/Calendar with EEPROM
X1226 INTERSIL-X1226_06 Datasheet
372Kb / 25P
   Real Time Clock/Calendar with EEPROM
X1226 INTERSIL-X1226 Datasheet
388Kb / 25P
   Real Time Clock/Calendar with EEPROM
X1243 INTERSIL-X1243 Datasheet
293Kb / 17P
   Real Time Clock/Calendar/Alarm with EEPROM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com