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ISLA112P25MREP データシート(PDF) 5 Page - Intersil Corporation

部品番号 ISLA112P25MREP
部品情報  Low Power 12-Bit, 250MSPS ADC
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メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISLA112P25MREP データシート(HTML) 5 Page - Intersil Corporation

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ISLA112P25MREP
5
FN7646.0
June 25, 2010
Table of Contents
Block Diagram ..................................................................................................................................... 1
Pin Configuration................................................................................................................................. 2
Pin Descriptions .................................................................................................................................. 2
Ordering Information .......................................................................................................................... 4
Absolute Maximum Ratings ................................................................................................................. 6
Thermal Information ........................................................................................................................... 6
Operating Conditions........................................................................................................................... 6
Electrical Specifications....................................................................................................................... 6
Digital Specifications ........................................................................................................................... 8
Timing Diagrams ................................................................................................................................. 9
Switching Specifications...................................................................................................................... 9
Typical Performance Curves .............................................................................................................. 11
Theory of Operation........................................................................................................................... 14
Functional Description....................................................................................................................... 14
Power-On Calibration........................................................................................................................ 14
User-Initiated Reset ......................................................................................................................... 15
Analog Input ................................................................................................................................... 15
Clock Input ..................................................................................................................................... 16
Jitter .............................................................................................................................................. 17
Voltage Reference ............................................................................................................................ 17
Digital Outputs ................................................................................................................................ 17
Over Range Indicator........................................................................................................................ 17
Power Dissipation............................................................................................................................. 17
Nap/Sleep ....................................................................................................................................... 17
Data Format .................................................................................................................................... 18
Serial Peripheral Interface ................................................................................................................ 20
SPI Physical Interface ....................................................................................................................... 20
SPI Configuration ............................................................................................................................. 21
Device Information........................................................................................................................... 21
Indexed Device Configuration/Control ................................................................................................. 21
Global Device Configuration/Control.................................................................................................... 22
SPI Memory Map.............................................................................................................................. 25
Equivalent Circuits............................................................................................................................. 26
ADC Evaluation Platform ................................................................................................................... 27
Layout Considerations ....................................................................................................................... 27
Split Ground and Power Planes........................................................................................................... 27
Clock Input Considerations ................................................................................................................ 27
Exposed Paddle................................................................................................................................ 27
Bypass and Filtering ......................................................................................................................... 27
LVDS Outputs .................................................................................................................................. 27
LVCMOS Outputs.............................................................................................................................. 28
Unused Inputs ................................................................................................................................. 28
Definitions......................................................................................................................................... 28
Revision History ................................................................................................................................ 28
Products ............................................................................................................................................ 28
Package Outline Drawing .................................................................................................................. 29


同様の部品番号 - ISLA112P25MREP

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Intersil Corporation
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同様の説明 - ISLA112P25MREP

メーカー部品番号データシート部品情報
logo
Intersil Corporation
ISLA112P25M INTERSIL-ISLA112P25M Datasheet
1,005Kb / 29P
   Low Power 12-Bit, 250MSPS ADC
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992Kb / 29P
   Low Power 12-Bit, 250MSPS ADC
November 17, 2011
logo
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