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ISL12026IBZ データシート(PDF) 7 Page - Intersil Corporation |
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ISL12026IBZ データシート(HTML) 7 Page - Intersil Corporation |
7 / 24 page 7 FN8231.9 November 30, 2010 Description The ISL12026 device is a Real Time Clock with clock/ calendar, two polled alarms with integrated 512x8 EEPROM, oscillator compensation and battery backup switch. The oscillator uses an external, low-cost 32.768kHz crystal. All compensation and trim components are integrated on the chip. This eliminates several external discrete components and a trim capacitor, saving board area and component cost. The Real Time Clock keeps track of time with separate registers for Hours, Minutes and Seconds. The Calendar has separate registers for Date, Month, Year and Day-of-week. The calendar is correct through 2099, with automatic leap year correction. The Dual Alarms can be set to any Clock/Calendar value for a match. For instance, every minute, every Tuesday, or 5:23 AM on March 21. The alarms can be polled in the Status Register or can provide a hardware interrupt (IRQ/FOUT Pin). There is a pulse mode for the alarms allowing for repetitive alarm functionality. The IRQ/FOUT pin may be software selected to provide a frequency output of 1Hz, 4096Hz, or 32,768Hz or inactive. The device offers a backup power input pin. This VBAT pin allows the device to be backed up by battery or SuperCap. The entire ISL12026 device is fully operational from 2.7V to 5.5V and the clock/calendar portion of the ISL12026 device remains fully operational down to 1.8V (Standby Mode). The ISL12026 device provides 4k bits of EEPROM with 8 modes of BlockLock™ control. The BlockLock™ allows a safe, secure memory for critical user and configuration data, while allowing a large user storage area. Pin Descriptions Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. The input buffer on this pin is always active (not gated). The pull-up resistor on this pin must use the same voltage source as VDD. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. The input buffer is always active (not gated). This open drain output requires the use of a pull-up resistor. The pull-up resistor on this pin must use the same voltage source as VDD. The output circuitry controls the fall time of the output signal with the use of a slope controlled pull-down. The circuit is designed to comply with 400kHz I2C interface speed. VBAT This input provides a backup supply voltage to the device. VBAT supplies power to the device in the event the VDD supply fails. This pin can be connected to a battery, a SuperCap or tied to ground if not used. IRQ/FOUT (Interrupt Output/Frequency Output) This dual function pin can be used as an interrupt or frequency output pin. The IRQ/FOUT mode is selected via the frequency out control bits of the INT register. • Interrupt Mode. The pin provides an interrupt signal output. This signal notifies a host processor that an alarm has occurred and requests action. It is an open drain active low output. • Frequency Output Mode. The pin outputs a clock signal which is related to the crystal frequency. The frequency output is user selectable and enabled via the I2C bus. It is an open drain output. FIGURE 5. IDD3 vs VDD FIGURE 6. ΔF OUT vs ATR SETTING Typical Performance Curves (Continued)Temperature is +25°C unless otherwise specified. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1.82.3 2.83.3 3.84.3 4.8 5.3 VDD (V) -40 -20 0 20 40 60 80 -32 -28 -24 -20 -16 -12 -8 -4 0 4 8 12 16 20 24 28 ATR SETTING ISL12026, ISL12026A |
同様の部品番号 - ISL12026IBZ |
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同様の説明 - ISL12026IBZ |
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