ADC1415S065 datasheet(28/33 Pages) NXP

部品番号	ADC1415S065

部品情報	Single 14-bit ADC 65, 80, 105 or 125 Msps with Input Buffer CMOS or LVDS DDR digital outputs

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ADC1415S065_080_105_125_2

Objective data sheet

Rev. 02 — 4 June 2009

28 of 33

NXP Semiconductors

ADC1415S065/080/105/125

Single 14-bit ADC 65, 80, 105 or 125 Msps with input buffer

Table 28.

CMOS output register (address 0020h) bit description

Bit

Symbol

Access

Value

Description

7 to 4 reserved

3 to 2 DAV_DRV

R/W

drive strength for DAV CMOS output buffer

00

low

01

medium

10

high

11

very high

1 to 0 DATA_DRV

R/W

drive strength for DATA CMOS output buffer

00

low

01

medium

10

high

11

very high

Table 29.

LVDS DDR output register 1 (address 0021h) bit description

Bit

Symbol

Access

Value

Description

7 to 6

5

DAVI_x2_EN

R/W

double LVDS current for DAV LVDS buffer

0

disabled

1

enabled

4 to 3 DAVI

R/W

LVDS current for DAV LVDS buffer

00

3.5 mA

01

4.5 mA

10

1.25 mA

11

2.5 mA

2

DATAI_x2_EN

R/W

double LVDS current for DATA LVDS buffer

0

disabled

1

enabled

1 to 0 DATAI

R/W

LVDS current for DATA LVDS buffer

00

3.5 mA

01

4.5 mA

10

1.25 mA

11

2.5 mA

Table 30.

LVDS DDR output register 2 (address 0022h) bit description

Bit

Symbol

Access

Value Description

7 to 4 reserved

3

BIT/BYTE_WISE R/W

DDR mode for LVDS output

0

bit wise (even data bits output on DAV rising edge /

odd data bits output on DAV falling edge)

1

byte wise (MSB data bits output on DAV rising

edge / LSB data bits output on DAV falling edge)

同様の部品番号 - ADC1415S065

メーカー	部品番号	データシート	部品情報
NXP Semiconductors	ADC1415S065HN	304Kb / 42P	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Mspswith input buffer; CMOS or LVDS DDR digital outputs Rev. 4-17 December 2010
Integrated Device Techn...	ADC1415S065HN-C1	383Kb / 40P	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs
NXP Semiconductors	ADC1415S065HN/C1	288Kb / 39P	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs Rev. 03-12 April 2010

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同様の説明 - ADC1415S065

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