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LC378000RP データシート(PDF) 4 Page - Sanyo Semicon Device |
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LC378000RP データシート(HTML) 4 Page - Sanyo Semicon Device |
4 / 4 page PS No. 5793-4/4 LC378000RP This catalog provides information as of April, 1998. Specifications and information herein are subject to change without notice. s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. Test Conditions Timing Waveforms Output Load Input voltage amplitude 0.4 V to 2.8 V Rise and fall times 5 ns Input discrimination level 1.5 V Output discrimination level 1.5 V Output load See figure. *: Includes the oscilloscope and jig capacitances. Note: Items in parentheses are for byte mode operation. Notes on System Design This IC adopts the ATD technique, in which operation starts when a change in either the CE or address inputs is detected. This means that the output data immediately after power is applied is invalid. When using this IC as program memory for the Z80 and similar microprocessors, applications must take into account the fact that valid data will not be output after power is first applied unless the value of either the CE line or at least one of the address lines is changed after the power supply has stabilized. Another point due to the use of the ATD technique is that this IC is sensitive to input noise. Do not apply voltages outside the allowable DC input levels for extended periods and do not apply input voltages with large noise components. Address input Data output tCEON |
同様の部品番号 - LC378000RP |
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同様の説明 - LC378000RP |
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