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LC75884W データシート(PDF) 7 Page - Sanyo Semicon Device |
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LC75884W データシート(HTML) 7 Page - Sanyo Semicon Device |
7 / 27 page No. 6086-7/27 LC75884E, LC75884W Pin Pin No. Function Active I/O Handling LC75884E LC75884W when unused S1/P1 1 79 S2/P2 2 80 S3/P3 3 1 — q q OPEN S4/P4 4 2 S5 to S53 5 to 53 3 to 51 COM1 54 52 COM2 55 53 — q q OPEN COM3 56 54 COM4 57 55 KS1/S54 58 56 KS2/S55 59 57 — O OPEN KS3 to KS6 60 to 63 58 to 61 KI1 to KI5 64 to 68 62 to 66 H I GND OSC 75 73 — I/O VDD CE 78 76 H I CL 79 77 I GND DI 80 78 — I DO 77 75 — O OPEN RES 76 74 L I VDD TEST 74 72 This pin must be connected to ground. — I — VLCD1 71 69 — I OPEN VLCD2 72 70 — I OPEN VDD 69 67 — — — VLCD 70 68 — — — VSS 73 71 Power supply connection. Connect to ground. — — — Pin Functions Segment outputs for displaying the display data transferred by serial data input. The S1/P1 to S4/P4 pins can be used as general-purpose output ports under serial data control. Common driver outputs The frame frequency fo is given by : fo = (fOSC/512)Hz. Key scan outputs Although normal key scan timing lines require diodes to be inserted in the timing lines to prevent shorts, since these outputs are unbalanced CMOS transistor outputs, these outputs will not be damaged by shorting when these outputs are used to form a key matrix. The KS1/S54 and KS2/S55 pins can be used as segment outputs when so specified by the control data. Key scan inputs These pins have built-in pull-down resistors. Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitor at this pin. Serial data interface connections to the controller. Note that DO, being an open-drain output, requires a pull-up resistor. CE :Chip enable CL :Synchronization clock DI :Transfer data DO :Output data v Reset signal input RES=low •••• Display off Key scan disabled All key data is reset to low RES=high ••• Display on Key scan enabled However, serial data can be transferred when RES is low. Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to VLCD2 when a 1/2 bias drive scheme is used. Used for applying the LCD drive 1/3 bias voltage externally. Must be connected to VLCD1 when a 1/2 bias drive scheme is used. Logic block power supply connection. Provide a voltage of between 4.5 and 6.0V. LCD driver block power supply connection. Provide a voltage of between VDD–0.5 and 6.0V. |
同様の部品番号 - LC75884W |
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同様の説明 - LC75884W |
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