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ISL24212 データシート(PDF) 9 Page - Intersil Corporation |
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ISL24212 データシート(HTML) 9 Page - Intersil Corporation |
9 / 12 page ISL24212 9 FN7590.0 March 15, 2011 CE Pin To change the counter controlling the output voltage, the CE (Counter Enable) pin must be pulled high (VDD). When the CE pin is pulled low, the counter value is loaded from EEPROM, which takes 10ms (during which the inputs should remain constant). The CE pin has an internal pull-down to keep it at a logic low when not being driven. CE should be pulled low before powering the device down to ensure that any glitches or transients during power-down will not cause unwanted EEPROM overwriting. The CE pin has a Schmitt trigger on the input to prevent false triggering during slow transitions of the CE pin. The CE pin transition time should be 10µs or less. Programming the EEPROM To program the non-volatile EEPROM, pull the CTL pin above 4.9V for more than 200µs. The level and timing is shown in Figure 9. It then takes a maximum of 100ms after CTL crosses 4.9V for the programming to be completed inside the device. When the part is programmed, the data in the counter register is written into the EEPROM. This value will be loaded from the EEPROM during subsequent power-ups as well as when the CE pin is pulled low. The ISL24212 is factory-programmed to mid-scale. As with asserting CE, the first pulse after a program operation is ignored. The EEPROM contents can be written and verified using the following steps: 1. Power-up the ISL24212. The EEPROM value will be loaded. 2. Set the CE pin to VDD. 3. Change the VOUT voltage using the CTL pin to the desired value, noting that first pulse will be ignored. 4. Pull the CTL pin to 4.9V or higher for at least 200µs. The counter value will be written to EEPROM after 100ms. 5. Change the VOUT value (using the CTL pin) to a different value, noting that first pulse after programming will be ignored. 6. Set the CE pin to 0V. The stored output value will be loaded from EEPROM after 10ms. 7. Verify that the output value is the same value programmed in Step 4. The CTL pin should be left floating after programming. The voltage at the CTL pin will be internally biased to VDD/2 to ensure that no additional pulses will be seen by the Up/Down counter. To prevent further changes, ground the CE pin. Typical Application Circuit Shown below in Figure 10 is a typical circuit that can be used to program the ISL24212 via the up/down counter interface. Three momentary push-button switches are required. SW1 connected between CTL and AVDD allows the user to bring CTL above VDD for programming the EEPROM, SW2 connected to VDD to pull CTL up, and SW3 connected to GND to pull CTL to down. All the switches should have 1kΩ current-limiting resistors in series. For adjustment and programming to occur, the CE pin has to be set to VDD. This can be achieved by a single-pull double-throw switch (SW4) connected between VDD and GND. Note that pressing the UP button increments the counter, but results in VCOM_OUT decreasing. Similarly, pressing the DOWN button decrements the counter, and results in VCOM_OUT increasing. CTL VOLTAGE TIME 4.9V tPROG FIGURE 9. EEPROM PROGRAMMING >200µs 100ms EEPROM OPERATION COMPLETE FIGURE 10. TYPICAL APPLICATION CIRCUIT ISL24212 CTL 0.01µF 1k Ω VDD CLOSE TO UP PROGRAM 1k Ω AVDD DOWN 1k Ω EEPROM CE DVR_OUT SET R1 R2 RSET INN VCOM_OUT VCOM to LCD Panel SW2 SW1 SW3 SW4 AVDD VDD AVDD GND VDD AVDD 0.01µF 0.1µF 0.1µF ENABLE VDD ADJUST / PROGRAM DISABLE |
同様の部品番号 - ISL24212 |
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同様の説明 - ISL24212 |
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