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SM320F2801-EP データシート(PDF) 2 Page - Texas Instruments |
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SM320F2801-EP データシート(HTML) 2 Page - Texas Instruments |
2 / 118 page www.ti.com Contents SM320F2808-EP, SM320F2806-EP SM320F2801-EP Digital Signal Processors SGLS316A – MARCH 2006 – REVISED FEBRUARY 2007 1 Features .............................................................................................................................. 9 2 Introduction ....................................................................................................................... 10 ORDERING INFORMATION .............................................................................................. 10 2.1 Pin Assignments ............................................................................................................ 11 2.2 Signal Descriptions ......................................................................................................... 14 3 Functional Overview ........................................................................................................... 20 3.1 Memory Map ................................................................................................................ 21 3.2 Brief Descriptions ........................................................................................................... 25 3.2.1 C28x CPU ....................................................................................................... 25 3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 26 3.2.3 Peripheral Bus .................................................................................................. 26 3.2.4 Real-Time JTAG and Analysis ................................................................................ 26 3.2.5 Flash .............................................................................................................. 26 3.2.6 M0, M1 SARAMs ............................................................................................... 27 3.2.7 L0, L1, H0 SARAMs ............................................................................................ 27 3.2.8 Boot ROM ........................................................................................................ 27 3.2.9 Security .......................................................................................................... 28 3.2.10 Peripheral Interrupt Expansion (PIE) Block .................................................................. 28 3.2.11 External Interrupts (XINT1, XINT2, XNMI) ................................................................... 29 3.2.12 Oscillator and PLL .............................................................................................. 29 3.2.13 Watchdog ........................................................................................................ 29 3.2.14 Peripheral Clocking ............................................................................................. 29 3.2.15 Low-Power Modes .............................................................................................. 29 3.2.16 Peripheral Frames 0, 1, 2 (PFn) .............................................................................. 29 3.2.17 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 30 3.2.18 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 30 3.2.19 Control Peripherals ............................................................................................. 30 3.2.20 Serial Port Peripherals ......................................................................................... 30 3.3 Register Map ................................................................................................................ 31 3.4 Device Emulation Registers ............................................................................................... 33 3.5 Interrupts .................................................................................................................... 34 3.5.1 External Interrupts .............................................................................................. 36 3.6 System Control ............................................................................................................. 37 3.6.1 OSC and PLL Block ............................................................................................ 38 3.6.2 Watchdog Block ................................................................................................. 41 3.7 Low-Power Modes Block .................................................................................................. 42 4 Peripherals ........................................................................................................................ 43 4.1 32-Bit CPU-Timers 0/1/2 .................................................................................................. 43 4.2 Enhanced PWM Modules (ePWM1/2/3/4/5/6) .......................................................................... 45 4.3 Hi-Resolution PWM (HRPWM) ........................................................................................... 47 4.4 Enhanced CAP Modules (eCAP1/2/3/4) ................................................................................ 48 4.5 Enhanced QEP Modules (eQEP1/2) ..................................................................................... 49 4.6 Enhanced Analog-to-Digital Converter (ADC) Module ................................................................ 52 4.7 Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B) ..................................... 57 4.8 Serial Communications Interface (SCI) Modules (SCI-A, SCI-B) .................................................... 62 4.9 Serial Peripheral Interface (SPI) Modules (SPI-A, SPI-B, SPI-C, SPI-D) ........................................... 65 4.10 Inter-Integrated Circuit (I2C) ............................................................................................... 69 4.11 GPIO MUX .................................................................................................................. 71 5 Device Support .................................................................................................................. 75 5.1 Device and Development Support Tool Nomenclature ................................................................ 75 Contents 2 Submit Documentation Feedback |
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