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SM320F28335-EP データシート(PDF) 5 Page - Texas Instruments |
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SM320F28335-EP データシート(HTML) 5 Page - Texas Instruments |
5 / 169 page SM320F28335-EP www.ti.com SPRS581C – JUNE 2009 – REVISED JANUARY 2010 List of Figures 2-1 176-Pin PGF/PTP LQFP (Top View) .......................................................................................... 15 2-2 179-Ball GHH MicroStar BGA™ (Upper Left Quadrant) (Bottom View) .................................................. 16 2-3 179-Ball GHH MicroStar BGA™ (Upper Right Quadrant) (Bottom View) ................................................. 17 2-4 179-Ball GHH MicroStar BGA™ (Lower Left Quadrant) (Bottom View) .................................................. 18 2-5 179-Ball GHH MicroStar BGA ™(Lower Right Quadrant) (Bottom View) ................................................. 19 2-6 176-Ball GJZ Plastic BGA (Upper Left Quadrant) (Bottom View) .......................................................... 20 2-7 176-Ball GJZ Plastic BGA (Upper Right Quadrant) (Bottom View) ........................................................ 21 2-8 176-Ball GJZ Plastic BGA (Lower Left Quadrant) (Bottom View) .......................................................... 22 2-9 176-Ball GJZ Plastic BGA (Lower Right Quadrant) (Bottom View) ........................................................ 22 3-1 Functional Block Diagram ...................................................................................................... 33 3-2 Memory Map ...................................................................................................................... 35 3-3 External and PIE Interrupt Sources ............................................................................................ 48 3-4 External Interrupts ................................................................................................................ 48 3-5 Multiplexing of Interrupts Using the PIE Block ............................................................................... 49 3-6 Clock and Reset Domains ...................................................................................................... 52 3-7 OSC and PLL Block Diagram ................................................................................................... 53 3-8 Using a 3.3-V External Oscillator ............................................................................................... 54 3-9 Using a 1.9-V External Oscillator ............................................................................................... 54 3-10 Using the Internal Oscillator .................................................................................................... 54 3-11 Watchdog Module ................................................................................................................ 56 4-1 DMA Functional Block Diagram ................................................................................................ 59 4-2 CPU-Timers ....................................................................................................................... 60 4-3 CPU-Timer Interrupt Signals and Output Signal ............................................................................. 60 4-4 Multiple PWM Modules .......................................................................................................... 62 4-5 ePWM Submodules Showing Critical Internal Signal Interconnections ................................................... 65 4-6 eCAP Functional Block Diagram ............................................................................................... 69 4-7 eQEP Functional Block Diagram ............................................................................................... 70 4-8 Block Diagram of the ADC Module ............................................................................................ 73 4-9 ADC Pin Connections With Internal Reference .............................................................................. 74 4-10 ADC Pin Connections With External Reference ............................................................................. 75 4-11 McBSP Module .................................................................................................................. 78 4-12 eCAN Block Diagram and Interface Circuit ................................................................................... 81 4-13 eCAN-A Memory Map ........................................................................................................... 82 4-14 eCAN-B Memory Map ........................................................................................................... 83 4-15 Serial Communications Interface (SCI) Module Block Diagram ............................................................ 87 4-16 SPI Module Block Diagram (Slave Mode) .................................................................................... 90 4-17 I2C Peripheral Module Interfaces .............................................................................................. 91 4-18 GPIO MUX Block Diagram ...................................................................................................... 93 4-19 Qualification Using Sampling Window ......................................................................................... 98 4-20 External Interface Block Diagram .............................................................................................. 99 4-21 Typical 16-bit Data Bus XINTF Connections ................................................................................ 100 4-22 Typical 32-bit Data Bus XINTF Connections ................................................................................ 100 6-1 SM320F28335 Operating Life Derating Chart .............................................................................. 102 6-2 Typical Operational Current Versus Frequency ............................................................................ 107 6-3 Typical Operational Power Versus Frequency ............................................................................. 107 6-4 Emulator Connection Without Signal Buffering for the DSP .............................................................. 108 Copyright © 2009–2010, Texas Instruments Incorporated List of Figures 5 |
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