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ISLA118P50IRZ データシート(PDF) 5 Page - Intersil Corporation |
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ISLA118P50IRZ データシート(HTML) 5 Page - Intersil Corporation |
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5 / 34 page  ISLA118P50 5 FN7565.2 July 25, 2011 Absolute Maximum Ratings Thermal Information AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V OVDD to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V AVSS to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V Analog Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V Clock Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V Logic Inputs to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 72 Ld QFN (Notes 3, 4, 5) . . . . . . . . . . . . . . 23 0.75 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 3. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379 for details. 4. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. 5. For solder stencil layout and reflow guidelines, please see Tech Brief TB389. Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V, TA = -40°C to +85°C (typical specifications at +25°C), AIN = -1dBFS, FIN =105MHz, fSAMPLE = 500MSPS, after completion of I2E calibration. PARAMETER SYMBOL CONDITIONS ISLA118P50 (Note 6) UNITS MIN TYP MAX DC SPECIFICATIONS (Note 6) Analog Input Full-Scale Analog Input Range VFS Differential 1.41 1.45 1.52 VP-P Input Resistance RIN Differential 500 Ω Input Capacitance CIN Differential 1.9 pF Full Scale Range Temp. Drift AVTC Full Temp 325 ppm/°C Input Offset Voltage VOS -10 ±2.0 10 mV Gain Error EG ±2.0 % Common-Mode Output Voltage VCM 435 535 635 mV Clock Inputs Inputs Common Mode Voltage 0.9 V CLKP, CLKN Input Swing 0.2 1.8 V Power Requirements 1.8V Analog Supply Voltage AVDD 1.7 1.8 1.9 V 1.8V Digital Supply Voltage OVDD 1.7 1.8 1.9 V 1.8V Analog Supply Current IAVDD 173 186 mA 1.8V Digital Supply Current (Note 7) IOVDD 3mA LVDS, I2E powered down, Notch Filter powered down 72 79 mA 3mA LVDS, I2E On, Notch Filter On 117 mA Power Supply Rejection Ratio PSRR 30MHz, 200mVP-P -36 dB Total Power Dissipation |
同様の部品番号 - ISLA118P50IRZ |
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同様の説明 - ISLA118P50IRZ |
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