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ISL26132AVZ データシート(PDF) 4 Page - Intersil Corporation

部品番号 ISL26132AVZ
部品情報  Low-Noise 24-bit Delta Sigma ADC
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メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL26132AVZ データシート(HTML) 4 Page - Intersil Corporation

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ISL26132, ISL26134
4
FN6954.1
September 9, 2011
Circuit Description
The ISL26132 (2-channel) and ISL26134 (4-channel) devices are
very low noise 24-bit delta-sigma ADCs that include a
programmable gain amplifier and an input multiplexer. The
ISL26132 offers an on-chip temperature measurement
capability.
The ISL26132, ISL26134 provide pin compatibility and output
data compatibility with the ADS1232/ADS1234, and offer the
same conversion rates of 10Sps and 80Sps.
All the features of the ISL26132, ISL26134 are pin-controllable,
while offset calibration, standby mode, and output conversion
data are accessible through a simple 2-wire interface.
The clock can be selected to come from an internal oscillator, an
external clock signal, or crystal (4.9152MHz typical).
SPEED
21
25
Digital Input
PDWN
22
26
Digital Input
Power-Down: Holding this pin low powers down the entire
converter and resets the ADC.
SCLK
23
27
Digital Input
Serial Clock: Clock out data on the rising edge. Also used to
initiate Offset Calibration and Sleep modes. See “Serial Clock
Input (SCLK)” on page 14 for more details.
SDO/RDY
24
28
Digital Output
Dual-Purpose Output:
Data Ready: Indicate valid data by going low.
Data Output: Outputs data, MSB first, on the first rising edge
of SCLK.
Pin Descriptions (Continued)
NAME
PIN NUMBER
ANALOG/DIGITAL
INPUT/OUTPUT
DESCRIPTION
ISL26132
ISL26134
TABLE 4. DATA RATE SELECT
SPEED
DATA RATE
010Sps
1
80Sps


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