データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

FM24C04C-GTR データシート(PDF) 6 Page - Ramtron International Corporation

部品番号 FM24C04C-GTR
部品情報  4Kb Serial 5V F-RAM Memory
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  RAMTRON [Ramtron International Corporation]
ホームページ  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM24C04C-GTR データシート(HTML) 6 Page - Ramtron International Corporation

Back Button FM24C04C-GTR Datasheet HTML 2Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 3Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 4Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 5Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 6Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 7Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 8Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 9Page - Ramtron International Corporation FM24C04C-GTR Datasheet HTML 10Page - Ramtron International Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 12 page
background image
FM24C04C
Rev. 1.1
June 2011
Page 6 of 12
S
A
Slave Address
0
Word Address
A
Data Byte
A P
By Master
By F-RAM
Start
Address & Data
Stop
Acknowledge
Figure 5. Byte Write
S
A
Slave Address
0
Word Address
A
Data Byte
A
P
By Master
By F-RAM
Start
Address & Data
Stop
Acknowledge
Data Byte
A
Figure 6. Multiple-Byte Write
Read Operation
There are two basic types of read operations. They are
current address read and selective address read. In a
current address read, the FM24C04C uses the internal
address latch to supply the lower 8 address bits. In a
selective read, the user performs a procedure to set
these lower address bits to a specific value.
Current Address & Sequential Read
The FM24C04C uses an internal latch to supply the
lower 8 address bits for a read operation. A current
address read uses the existing value in the address
latch as a starting place for the read operation. This is
the address immediately following that of the last
operation.
To perform a current address read, the bus master
supplies a slave address with the LSB set to 1. This
indicates that a read operation is requested. The page
select bit in the slave address specifies the block of
memory that is used for the read operation. After the
acknowledge, the FM24C04C will begin shifting out
data from the current address. The current address is
the bit from the slave address combined with the 8 bits
that were in the internal address latch.
Beginning with the current address, the bus master can
read any number of bytes. Thus a sequential read is
simply a current address read with multiple byte
transfers. After each byte the internal address counter
will be incremented. Each time the bus master
acknowledges
a
byte,
this
indicates
that
the
FM24C04C should read out the next sequential byte.
There are four ways to properly terminate a read
operation. Failing to properly terminate the read will
most likely create a bus contention as the FM24C04C
attempts to read out additional data onto the bus. The
four valid methods are as follows.
1.
The bus master issues a no-acknowledge in the
9
th clock cycle and a stop in the 10th clock cycle.
This is illustrated in the diagrams below. This is
the preferred method.
2.
The bus master issues a no-acknowledge in the
9
th clock cycle and a start in the 10th.
3.
The bus master issues a stop in the 9
th clock
cycle. Bus contention may result.
4.
The bus master issues a start in the 9
th clock
cycle. Bus contention may result.
If the internal address reaches 1FFh it will wrap
around to 000h on the next read cycle. Figures 7 and
8 show the proper operation for current address reads.
Selective (Random) Read
A simple technique allows a user to select a random
address location as the starting point for a read
operation. This involves using the first two bytes of a
write operation to set the internal address byte
followed by subsequent read operations.
To perform a selective read, the bus master sends out
the slave address with the LSB set to 0. This specifies
a write operation. According to the write protocol, the
bus master then sends the word address byte that is
loaded into the internal address latch. After the
FM24C04C acknowledges the word address, the bus
master issues a start condition. This simultaneously
aborts the write operation and allows the read
command to be issued with the slave address LSB set
to a 1. The operation is now a current address read.
See Figure 9.


同様の部品番号 - FM24C04C-GTR

メーカー部品番号データシート部品情報
logo
Fairchild Semiconductor
FM24C04 FAIRCHILD-FM24C04 Datasheet
105Kb / 14P
   4K-Bit Standard 2-Wire Bus Interface Serial EEPROM
logo
List of Unclassifed Man...
FM24C04A ETC1-FM24C04A Datasheet
100Kb / 12P
   4Kb FRAM Serial Memory
logo
Ramtron International C...
FM24C04A RAMTRON-FM24C04A Datasheet
98Kb / 12P
   4Kb FRAM Serial Memory
FM24C04A-G RAMTRON-FM24C04A-G Datasheet
98Kb / 12P
   4Kb FRAM Serial Memory
logo
List of Unclassifed Man...
FM24C04A-S ETC1-FM24C04A-S Datasheet
100Kb / 12P
   4Kb FRAM Serial Memory
More results

同様の説明 - FM24C04C-GTR

メーカー部品番号データシート部品情報
logo
Ramtron International C...
FM25040B RAMTRON-FM25040B Datasheet
313Kb / 13P
   4Kb Serial 5V F-RAM Memory
logo
Cypress Semiconductor
FM25040B CYPRESS-FM25040B Datasheet
449Kb / 13P
   4Kb Serial 5V F-RAM Memory
FM24C04B CYPRESS-FM24C04B_13 Datasheet
324Kb / 13P
   4Kb Serial 5V F-RAM Memory
logo
Ramtron International C...
FM25040C RAMTRON-FM25040C Datasheet
266Kb / 13P
   4Kb Serial 5V F-RAM Memory
FM24C04B RAMTRON-FM24C04B Datasheet
293Kb / 12P
   4Kb Serial 5V F-RAM Memory
logo
Cypress Semiconductor
FM24C04B CYPRESS-FM24C04B Datasheet
335Kb / 12P
   4Kb Serial 5V F-RAM Memory
FM25040B CYPRESS-FM25040B_13 Datasheet
402Kb / 14P
   4Kb Serial 5V F-RAM Memory
FM25040B-GA CYPRESS-FM25040B-GA Datasheet
419Kb / 14P
   Automotive Temp. 4Kb Serial 5V F-RAM Memory
FM24CL04B CYPRESS-FM24CL04B_13 Datasheet
325Kb / 13P
   4Kb Serial 3V F-RAM Memory
logo
Ramtron International C...
FM24CL04B RAMTRON-FM24CL04B Datasheet
287Kb / 12P
   4Kb Serial 3V F-RAM Memory
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com