データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

FM24C64C-GTR データシート(PDF) 5 Page - Ramtron International Corporation

部品番号 FM24C64C-GTR
部品情報  64Kb Serial 5V F-RAM Memory
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  RAMTRON [Ramtron International Corporation]
ホームページ  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM24C64C-GTR データシート(HTML) 5 Page - Ramtron International Corporation

  FM24C64C-GTR Datasheet HTML 1Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 2Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 3Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 4Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 5Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 6Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 7Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 8Page - Ramtron International Corporation FM24C64C-GTR Datasheet HTML 9Page - Ramtron International Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 12 page
background image
FM24C64C
Rev. 1.1
June 2011
5 of 12
1
0
1
0
A2
A1
A0 R/W
Slave
ID
Device
Select
7
6
5
4
3
2
1
0
Figure 4. Slave Address
Addressing Overview
After the FM24C64C (as receiver) acknowledges the
device address, the master can place the memory
address on the bus for a write operation. The address
requires two bytes. The first is the MSB (upper byte).
Since the device uses only 13 address bits, the value
of the upper three bits are don’t care. Following the
MSB is the LSB (lower byte) with the remaining
eight address bits. The address value is latched
internally. Each access causes the latched address
value to be incremented automatically. The current
address is the value that is held in the latch, either a
newly written value or the address following the last
access. The current address will be held as long as
power remains or until a new value is written. Reads
always use the current address. A random read
address can be loaded by beginning a write operation
as explained below.
After transmission of each data byte and just prior to
the acknowledge, the FM24C64C increments the
internal address latch. This allows the next sequential
byte to be accessed with no additional addressing
externally. After the last address (1FFFh) is reached,
the address latch will roll over to 0000h. There is no
limit to the number of bytes that can be accessed with
a single read or write operation.
Data Transfer
After the address information has been transmitted,
data transfer between the bus master and the
FM24C64C can begin. For a read operation, the
FM24C64C will place 8 data bits on the bus then
wait for an Acknowledge from the master. If the
Acknowledge occurs, the FM24C64C will transfer
the next sequential byte. If the Acknowledge is not
sent, the FM24C64C will end the read operation. For
a write operation, the FM24C64C will accept 8 data
bits from the master and then send an Acknowledge.
All data transfer occurs MSB (most significant bit)
first.
Memory Operation
The FM24C64C is designed to operate in a manner
very similar to other 2-wire interface memory
products. The major differences result from the
higher performance write capability of FRAM
technology. These improvements result in some
differences between the FM24C64C and a similar
configuration
EEPROM
during
writes.
The
complete operation for both writes and reads is
explained below.
Write Operation
All writes begin with a device address, then a
memory address. The bus master indicates a write
operation by setting the LSB of the device address
to a 0. After addressing, the bus master sends each
byte of data to the memory and the memory
generates an acknowledge condition. Any number of
sequential bytes may be written. If the end of the
address range is reached internally, the address
counter will wrap from 1FFFh to 0000h.
Unlike other nonvolatile memory technologies,
there is no write delay with FRAM. The entire
memory cycle occurs in less time than a single bus
clock. Therefore, any operation including a read or
write can occur immediately following a write.
Acknowledge
polling,
a
technique
used
with
EEPROMs to determine if a write is complete is
unnecessary and
will
always
return a
ready
condition.
Internally, the actual memory write occurs after the
8
th data bit is transferred. It will be complete before
the Acknowledge is sent. Therefore, if the user
desires to abort a write without altering the memory
contents, this should be done using a Start or Stop
condition prior to the 8
th data bit. The FM24C64C
uses no page buffering.
Portions of the memory array can be write protected
using the WP pin. Pulling the WP pin high (VDD)
will write-protect addresses in the upper quadrant
from 1800h to 1FFFh. The FM24C64C will not
acknowledge data bytes that are written to protected
addresses. In addition, the address counter will not
increment if writes are attempted to these addresses.
Pulling WP low (VSS) will deactivate this feature.
WP should not be left floating.
Figures 5 and 6 illustrate both a single-byte and
multiple-byte write cases.


同様の部品番号 - FM24C64C-GTR

メーカー部品番号データシート部品情報
logo
Fairchild Semiconductor
FM24C64 FAIRCHILD-FM24C64 Datasheet
100Kb / 13P
   64K-Bit Standard 2-Wire Bus Interface Serial EEPROM
logo
List of Unclassifed Man...
FM24C64 ETC-FM24C64 Datasheet
320Kb / 13P
   FM24C64
logo
Ramtron International C...
FM24C64 RAMTRON-FM24C64 Datasheet
98Kb / 12P
   64Kb FRAM Serial Memory
FM24C64 RAMTRON-FM24C64 Datasheet
7Mb / 28P
   VersaKit-30xx Development System Overview
Rev 2.0
FM24C64-G RAMTRON-FM24C64-G Datasheet
98Kb / 12P
   64Kb FRAM Serial Memory
More results

同様の説明 - FM24C64C-GTR

メーカー部品番号データシート部品情報
logo
Cypress Semiconductor
FM24C64B CYPRESS-FM24C64B_13 Datasheet
352Kb / 15P
   64Kb Serial 5V F-RAM Memory
logo
Ramtron International C...
FM25640B RAMTRON-FM25640B Datasheet
213Kb / 13P
   64Kb Serial 5V F-RAM Memory
FM25640C RAMTRON-FM25640C Datasheet
321Kb / 13P
   64Kb Serial 5V F-RAM Memory
FM24C64B RAMTRON-FM24C64B Datasheet
293Kb / 12P
   64Kb Serial 5V F-RAM Memory
logo
Cypress Semiconductor
FM24C64B CYPRESS-FM24C64B Datasheet
347Kb / 12P
   64Kb Serial 5V F-RAM Memory
FM25640B-G CYPRESS-FM25640B-G Datasheet
441Kb / 13P
   64Kb Serial 5V F-RAM Memory
FM25640B CYPRESS-FM25640B Datasheet
441Kb / 13P
   64Kb Serial 5V F-RAM Memory
FM25640B CYPRESS-FM25640B_13 Datasheet
400Kb / 14P
   64Kb Serial 5V F-RAM Memory
FM1608B CYPRESS-FM1608B Datasheet
342Kb / 14P
   64Kb Bytewide 5V F-RAM Memory
logo
Ramtron International C...
FM1608B RAMTRON-FM1608B Datasheet
94Kb / 11P
   64Kb Bytewide 5V F-RAM Memory
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com