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DAC904UG4 データシート(PDF) 10 Page - Texas Instruments |
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DAC904UG4 データシート(HTML) 10 Page - Texas Instruments |
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10 / 23 page  DAC904 10 SBAS095C www.ti.com APPLICATION INFORMATION THEORY OF OPERATION The architecture of the DAC904 uses the current steering technique to enable fast switching and a high update rate. The core element within the monolithic DAC is an array of seg- mented current sources that are designed to deliver a full-scale output current of up to 20mA, as shown in Figure 1. An internal decoder addresses the differential current switches each time the DAC is updated and a corresponding output current is formed by steering all currents to either output summing node, IOUT or IOUT. The complementary outputs deliver a differential output signal that improves the dynamic performance through reduction of even-order harmonics, common-mode signals (noise), and double the peak-to-peak output signal swing by a factor of two, compared to single-ended operation. FIGURE 1. Functional Block Diagram of the DAC904. PMOS Current Source Array LSB Switches Segmented MSB Switches +1.24V Ref Latches and Switch Decoder Logic 14-Bit Data Input D13...D0 DAC904 Full-Scale Adjust Resistor Ref Control Amp Ref Buffer BW +V D +V A R SET 2k Ω CLK DGND Ref Input 0.1 µF INT/EXT I OUT I OUT BYP PD 20pF(1) 50 Ω 50 Ω 20pF(1) 1:1 V OUT 0.1 µF 400pF 0.1 µF(1) +3V to +5V Analog Bandwidth Control +3V to +5V Digital FSA REF IN AGND Analog Ground Digital Ground Power Down (internal pull-down) Clock Input NOTE: Supply bypassing not shown. NOTE: (1) Optional. TYPICAL CHARACTERISTICS: VD = VA = +3V (Cont.) At TA = +25°C, Differential IOUT = 20mA, 50Ω double-terminated load, SFDR up to Nyquist, unless otherwise specified. FOUR-TONE OUTPUT SPECTRUM Frequency (MHz) 0 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 510 15 20 25 f CLOCK = 50MSPS f OUT1 = 6.25MHz f OUT2 = 6.75MHz f OUT3 = 7.25MHz f OUT4 = 7.75MHz SFDR = 67dBc Amplitude = 0dBFS The segmented architecture results in a significant reduction of the glitch energy, and improves the dynamic performance (SFDR) and DNL. The current outputs maintain a very high output impedance of greater than 200k Ω. The full-scale output current is determined by the ratio of the internal reference voltage (1.24V) and an external resistor, RSET. The resulting IREF is internally multiplied by a factor of 32 to produce an effective DAC output current that can range from 2mA to 20mA, depending on the value of RSET. The DAC904 is split into a digital and an analog portion, each of which is powered through its own supply pin. The digital section includes edge-triggered input latches and the de- coder logic, while the analog section comprises the current source array with its associated switches and the reference circuitry. |
同様の部品番号 - DAC904UG4 |
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同様の説明 - DAC904UG4 |
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