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UC1825A-SP データシート(PDF) 8 Page - Texas Instruments |
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UC1825A-SP データシート(HTML) 8 Page - Texas Instruments |
8 / 16 page UDG-95106 ACTIVE LOW OUTPUTS DURING UVLO UDG-95106 UDG-95108 UC1825A-SP SLUS873A – JANUARY 2009 – REVISED APRIL 2009 ..................................................................................................................................................... www.ti.com Anytime ILIM exceeds 1.2 V, the fault latch is set and the output pins are driven low. The soft-start cap is then discharged by a 250- µA current sink. No more output pulses are allowed until soft-start is fully discharged and ILIM is below 1.2 V. At this point the fault latch resets and the chip executes a soft-start. Should the fault latch get set during soft-start, the outputs are immediately terminated, but the soft-start capacitor does not discharge until it has been fully charged first. This results in a controlled hiccup interval for continuous fault conditions. Figure 5. Soft-Start and Fault Waveforms The UVLO function forces the outputs to be low and considers both VCC and VREF before allowing the chip to operate. Figure 6. Output Voltage vs Output Current Figure 7. Output V and I During UVLO 8 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): UC1825A-SP |
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