SN54ABT32318, SN74ABT32318

18BIT TRIPORT UNIVERSAL BUS EXCHANGERS

SCBS180A − JUNE 1992 − REVISED JULY 1994

5−7

POST OFFICE BOX 655303

POST OFFICE BOX 1443

timing requirements over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Figure 1)

SN54ABT32318

SN74ABT32318

UNIT

MIN

MAX

MIN

MAX

UNIT

fclock

Clock frequency

150

150

MHz

tw

Pulse duration

LE high

3.3

3.3

ns

tw

Pulse duration

CLK high or low

3.3

3.3

ns

tsu

Setup time

A, B, or C before CLK

↑

2.4

2.4

ns

tsu

Setup time

A, B, or C before LE

↓

2.1

2.1

ns

th

Hold time

A, B, or C after CLK

↑

1.4

1.4

ns

th

Hold time

A, B, or C after LE

↓

2.1

2.1

ns

switching characteristics over recommended ranges of supply voltage and operating free-air

PARAMETER

FROM

TO

SN54ABT32318

SN74ABT32318

UNIT

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

MIN

MAX

MIN

MAX

UNIT

fmax

150

150

MHz

tPLH

A, B, or C

C, B, or A

1.4

6.5

1.4

6.1

ns

tPHL

A, B, or C

C, B, or A

1.1

6.8

1.1

6.6

ns

tPLH

SEL

C, B, or A

1.4

6.7

1.4

6.5

ns

tPHL

SEL

C, B, or A

1.8

6.8

1.8

6.5

ns

tPLH

LE

C, B, or A

2.6

8

2.6

7.5

ns

tPHL

LE

C, B, or A

2.6

7.4

2.6

6.9

ns

tPLH

CLK

C, B, or A

2.5

8

2.5

7.4

ns

tPHL

CLK

C, B, or A

2.5

7.2

2.5

6.7

ns

tPZH

OE

C, B, or A

1.4

6.9

1.4

6.8

ns

tPZL

OE

C, B, or A

2.4

7.2

2.4

7.1

ns

tPHZ

OE

C, B, or A

1

6.4

1

6.2

ns

tPLZ

OE

C, B, or A

2

6.4

2

6

ns

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.