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SN74AHC74-EP データシート(PDF) 1 Page - Texas Instruments |
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SN74AHC74-EP データシート(HTML) 1 Page - Texas Instruments |
1 / 10 page SN74AHC74-EP DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCLS489 – JUNE 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Controlled Baseline – One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of –55 °C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D EPIC (Enhanced-Performance Implanted CMOS) Process D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. description/ordering information The SN74AHC74 dual positive-edge-triggered device is a D-type flip-flop. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. ORDERING INFORMATION TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING 55 °Cto125°C SOIC – D Tape and reel SN74AHC74MDREP AHC74MEP –55 °C to 125°C TSSOP – PW Tape and reel SN74AHC74MPWREP AHC74EP ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2003, Texas Instruments Incorporated 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1CLR 1D 1CLK 1PRE 1Q 1Q GND VCC 2CLR 2D 2CLK 2PRE 2Q 2Q D OR PW PACKAGE (TOP VIEW) EPIC is a trademark of Texas Instruments. |
同様の部品番号 - SN74AHC74-EP |
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同様の説明 - SN74AHC74-EP |
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