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AD1893JN データシート(PDF) 9 Page - Analog Devices

部品番号 AD1893JN
部品情報  Low Cost SamplePort 16-Bit Stereo Asynchronous Sample Rate Converter
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD1893JN データシート(HTML) 9 Page - Analog Devices

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AD1893
REV. A
–9–
AMP
TIME
SUBFILTER COEFFICIENTS
ALIGNED TO THE LEFT
TSIN = 1/FSIN
FREQ
FSIN/2
FSIN/2
FSIN/2
FSIN/2
FSIN/2
PHASE
DELAY = NOMINAL
DELAY = NOMINAL
DELAY = NOMINAL – .25/FSIN
DELAY = NOMINAL – .5/FSIN
DELAY = NOMINAL – .75/FSIN
Figure 3. Four Polyphase Subfilters Realigned to Coarse Time Grid
POLYPHASE FILTER 1
POLYPHASE FILTER 2
POLYPHASE FILTER 3
POLYPHASE FILTER 4
POLYPHASE FILTER 5
POLYPHASE FILTER 6
POLYPHASE FILTER 7
INPUT
SIGNAL
POLYPHASE FILTER N-1
POLYPHASE FILTER N
SELECT
N TO 1
MUX
OUTPUT
SIGNAL
SAMPLE
CLOCK
TRACKING
CIRCUIT
Figure 4. Polyphase Filter Bank Model—Conceptual Block
Diagram
The full set of subfilters can be considered to form a parallel
bank of “polyphase” filters which have decrementing, linear
phase group delays. All of the polyphase filters conceptually
process the input signal simultaneously, as illustrated in Figure
4, at the input sample rate.
Asynchronous sample rate conversion under the polyphase filter
bank model is accomplished by selecting the output of a particu-
lar polyphase filter on the basis of the temporal relationship
between the input sample clock and the output sample clock
events. Figure 5 shows the desired filter group delay as a func-
tion of the relative time difference between the current output
sample clock and the last input sample clock. If an output
sample is requested late in the input sample period, then a short
filter delay is required, and if an output sample is requested
early in the input sample period, then a long filter delay is re-
quired. This nonintuitive result arises from the fact that FIR
filters always produce some delay, so that selecting a filter with
shorter delay moves the interpolated sample closer to the newest
input sample.


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